kernel/linux.git/arch/mips/include/asm/mach-generic, branch v4.9.331

MIPS: Adjust MIPS64 CAC_BASE to reflect Config.K0

2016-10-06T16:02:35+00:00

On MIPS64 we define the default CAC_BASE as one of the xkphys regions of the virtual address space. Since the CCA is encoded in bits 61:59 of xkphys addresses, fixing CAC_BASE to any particular one prevents us from dynamically changing the CCA as we do for MIPS32 where CAC_BASE is placed within kseg0. In order to make the kernel more generic, drop the current kludge that gives CAC_BASE CCA=3 if CONFIG_DMA_NONCOHERENT is selected (disregarding CONFIG_DMA_MAYBE_COHERENT) & CCA=5 (which is not standardised by the architecture) otherwise. Instead read Config.K0 and generate the appropriate offset into xkphys, presuming that either the bootloader or early kernel code will have configured Config.K0 appropriately. This seems like the best option for a generic implementation. The ip27 spaces.h is adjusted to set its former value of CAC_BASE, since it's the only user of CAC_BASE from assembly (in its smp_slave_setup macro). This allows the generic case to focus solely on C code without breaking ip27. Signed-off-by: Paul Burton Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/14351/ Signed-off-by: Ralf Baechle

MIPS: Support per-device DMA coherence

2016-10-06T16:02:01+00:00

On some MIPS systems, a subset of devices may have DMA coherent with CPU caches. For example in systems including a MIPS I/O Coherence Unit (IOCU), some devices may be connected to that IOCU whilst others are not. Prior to this patch, we have a plat_device_is_coherent() function but no implementation which does anything besides return a global true or false, optionally chosen at runtime. For devices such as those described above this is insufficient. Fix this by tracking DMA coherence on a per-device basis with a dma_coherent field in struct dev_archdata. Setting this from arch_setup_dma_ops() takes care of devices which set the dma-coherent property via device tree, and any PCI devices beneath a bridge described in DT, automatically. Signed-off-by: Paul Burton Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/14349/ Signed-off-by: Ralf Baechle

MIPS: Sanitise coherentio semantics

2016-10-06T16:01:28+00:00

The coherentio variable has previously been used as a boolean value, indicating whether the user specified that coherent I/O should be enabled or disabled. It failed to take into account the case where the user does not specify any preference, in which case it makes sense that we should default to coherent I/O if the hardware supports it (hw_coherentio is non-zero). Introduce an enum to clarify the 3 different values of coherentio & use it throughout the code, modifying plat_device_is_coherent() & r4k_cache_init() to take into account the default case. Signed-off-by: Paul Burton Cc: linux-mips@linux-mips.org Cc: Paul Burton Patchwork: https://patchwork.linux-mips.org/patch/14347/ Signed-off-by: Ralf Baechle

MIPS: Squash lines for simple wrapper functions

2016-10-04T14:13:57+00:00

Remove unneeded variables and assignments. Signed-off-by: Masahiro Yamada Cc: Boris Brezillon Cc: Brian Norris Cc: Michal Hocko Cc: Andrew Morton Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/14260/ Signed-off-by: Ralf Baechle

MIPS: Fix misspellings in comments.

2016-04-03T10:32:09+00:00

Signed-off-by: Adam Buchbinder Cc: linux-mips@linux-mips.org Cc: trivial@kernel.org Patchwork: https://patchwork.linux-mips.org/patch/12617/ Signed-off-by: Ralf Baechle

MIPS: Remove all the uses of custom gpio.h

2015-09-03T10:08:02+00:00

Currently CONFIG_ARCH_HAVE_CUSTOM_GPIO_H is defined for all MIPS machines, and each machine type provides its own gpio.h. However only a handful really implement the GPIO API, most just forward everythings to gpiolib. The Alchemy machine is notable as it provides a system to allow implementing the GPIO API at the board level. But it is not used by any board currently supported, so it can also be removed. For most machine types we can just remove the custom gpio.h, as well as the custom wrappers if some exists. Some of the code found in the wrappers must be moved to the respective GPIO driver. A few more fixes are need in some drivers as they rely on linux/gpio.h to provides some machine specific definitions, or used asm/gpio.h instead of linux/gpio.h for the gpio API. Signed-off-by: Alban Bedel Reviewed-by: Linus Walleij Cc: linux-mips@linux-mips.org Cc: Hauke Mehrtens Cc: Rafał Miłecki Cc: Bartlomiej Zolnierkiewicz Cc: Tejun Heo Cc: Alexandre Courbot Cc: Dmitry Torokhov Cc: Florian Fainelli Cc: Manuel Lauss Cc: Joe Perches Cc: Daniel Walter Cc: Sergey Ryazanov Cc: Huacai Chen Cc: James Hartley Cc: Andrew Bresticker Cc: Paul Burton Cc: Jiri Kosina Cc: Bjorn Helgaas Cc: Wolfram Sang Cc: Randy Dunlap Cc: Varka Bhadram Cc: Masanari Iida Cc: Tomi Valkeinen Cc: Michael Buesch Cc: abdoulaye berthe Cc: linux-kernel@vger.kernel.org Cc: linux-ide@vger.kernel.org Cc: linux-gpio@vger.kernel.org Cc: linux-input@vger.kernel.org Cc: netdev@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/10828/ Signed-off-by: Ralf Baechle

MIPS: Fix KVM guest fixmap address

2015-06-21T19:53:54+00:00

KVM guest kernels for trap & emulate run in user mode, with a modified set of kernel memory segments. However the fixmap address is still in the normal KSeg3 region at 0xfffe0000 regardless, causing problems when cache alias handling makes use of them when handling copy on write. Therefore define FIXADDR_TOP as 0x7ffe0000 in the guest kernel mapped region when CONFIG_KVM_GUEST is defined. Signed-off-by: James Hogan Cc: linux-mips@linux-mips.org Cc: # v3.10+ Patchwork: https://patchwork.linux-mips.org/patch/9887/ Signed-off-by: Ralf Baechle

MIPS/IRQCHIP: Move irq_chip from arch/mips to drivers/irqchip.

2015-06-21T19:52:50+00:00

While at it, rename it because in drivers/irqchip no longer every CPU is a MIPS. Signed-off-by: Ralf Baechle

MIPS: DMA: Allow platforms to override only the post DMA hook

2015-04-08T21:52:33+00:00

Instead of having platforms to copy the entirety of mach-generic/dma-coherence.h, check whether these platforms have already defined a plat_post_dma_flush hook, and if not, provide an inline stub. Signed-off-by: Florian Fainelli Cc: linux-mips@linux-mips.org Cc: cernekee@gmail.com Cc: jogo@openwrt.org Patchwork: https://patchwork.linux-mips.org/patch/9725/ Signed-off-by: Ralf Baechle

MIPS: DMA: Implement platform hook to perform post-DMA cache flushes.

2015-04-01T15:22:01+00:00

Signed-off-by: Ralf Baechle