kernel/linux.git/arch/mips/boot, branch master

MIPS: Add Mobileye EyeQ6Lplus evaluation board dts

2026-04-13T13:31:41+00:00

Add the device tree of the evaluation board of the EyeQ6Lplus SoC. The board comes with 2GB of RAM and an SPI NAND connected to the octoSPI controller The UART of the SoC is used as the serial console. Signed-off-by: Benoît Monin Signed-off-by: Thomas Bogendoerfer

MIPS: Add Mobileye EyeQ6Lplus SoC dtsi

2026-04-13T13:31:41+00:00

Add the device tree include files for the EyeQ6Lplus system on chip from Mobileye. Those files provide the initial support of the SoC: * The I6500 CPU and GIC interrupt controller. * The OLB ("Other Logic Block") providing clocks, resets and pin controls. * One UART. * One GPIO controller. * Two SPI controllers, one in host mode and one in target mode. * One octoSPI flash controller. * Two I2C controllers. Signed-off-by: Benoît Monin Signed-off-by: Thomas Bogendoerfer

MIPS: dts: loongson64g-package: Switch to Loongson UART driver

2026-04-06T12:14:24+00:00

Loongson64g is Loongson 3A4000, whose UART controller is compatible with Loongson 2K1500, which is NS16550A-compatible with an additional fractional frequency divisor register. Update the compatible strings to reflect this, so that 3A4000 can benefit from the fractional frequency divisor provided by loongson-uart. This is required on some devices, otherwise their UART can't work at some high baud rates, e.g., 115200. Tested on Loongson-LS3A4000-7A1000-NUC-SE with a 25MHz UART clock. Without fractional frequency divisor, the actual baud rate was 111607 (25MHz / 16 / 14, measured value: 111545) and some USB-to-UART converters couldn't work with it at all. With fractional frequency divisor, the measured baud rate becomes 115207, which is quite accurate. Signed-off-by: Rong Zhang Signed-off-by: Thomas Bogendoerfer

mips: dts: Add PCIe to EcoNet EN751221

2026-04-06T12:05:02+00:00

Add PCIe based on EN7528 PCIe driver, also add two MT76 wifi devices to SmartFiber XP8421-B. Signed-off-by: Caleb James DeLisle Signed-off-by: Thomas Bogendoerfer

MIPS: mobileye: eyeq5-epm: add two Cadence GEM Ethernet PHYs

2026-04-06T12:04:28+00:00

The Mobileye EyeQ5 eval board (EPM) embeds two MDIO PHYs. Reviewed-by: Andrew Lunn Acked-by: Thomas Bogendoerfer Signed-off-by: Théo Lebrun Signed-off-by: Thomas Bogendoerfer

MIPS: mobileye: eyeq5: add two Cadence GEM Ethernet controllers

2026-04-06T12:04:22+00:00

Add both MACB/GEM instances found in the Mobileye EyeQ5 SoC. Acked-by: Thomas Bogendoerfer Signed-off-by: Théo Lebrun Signed-off-by: Thomas Bogendoerfer

Merge tag 'mips_7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux

2026-02-16T17:30:44+00:00

Pull MIPS updates from Thomas Bogendoerfer: "Cleanups and fixes" * tag 'mips_7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (28 commits) Revert "clk: microchip: core: allow driver to be compiled with COMPILE_TEST" Revert "clk: microchip: fix typo in reference to a config option" MIPS: Implement ARCH_HAS_CC_CAN_LINK MIPS: rb532: Fix MMIO UART resource registration MIPS: Work around LLVM bug when gp is used as global register variable MIPS: Loongson64: env: Fixup serial clock-frequency when using LEFI MIPS: Loongson2ef: Use pcibios_align_resource() to block io range MIPS: Loongson2ef: Register PCI controller in early stage clk: microchip: fix typo in reference to a config option MIPS: Loongson64: dts: fix phy-related definition of LS7A GMAC clk: microchip: core: allow driver to be compiled with COMPILE_TEST MIPS: drop unused pic32.h header watchdog: pic32-wdt: update include to use pic32.h from platform_data watchdog: pic32-dmt: update include to use pic32.h from platform_data serial: pic32_uart: update include to use pic32.h from platform_data rtc: pic32: update include to use pic32.h from platform_data pinctrl: pic32: update include to use pic32.h from platform_data mmc: sdhci-pic32: update include to use pic32.h from platform_data irqchip/irq-pic32-evic: update include to use pic32.h from platform_data clk: microchip: core: update include to use pic32.h from platform_data ...

MIPS: tools: relocs: Ship a definition of R_MIPS_PC32

2026-02-03T04:56:42+00:00

R_MIPS_PC32 is a GNU extension, its definition is available in glibc only since 2.39 (released in 2024), and not available in musl libc yet. Provide our own definition for R_MIPS_PC32 and use it if necessary to fix relocs tool building on musl and older glibc systems. Fixes: ff79d31eb536 ("mips: Add support for PC32 relocations in vmlinux") Signed-off-by: Yao Zi Link: https://patch.msgid.link/20260202041610.61389-1-me@ziyao.cc Signed-off-by: Nathan Chancellor

MIPS: Loongson64: dts: fix phy-related definition of LS7A GMAC

2026-01-30T14:35:26+00:00

Currently the LS7A GMAC device tree node lacks a proper phy-handle property pointing to the PHY node. In addition, the phy-mode property specifies "rgmii" without any internal delay information, which means the board trace needs to add 2ns delay to the RGMII data lines; but that isn't known to happen on any Loongson board. The ACPI-based initialization codepath, which is used on LoongArch-based 3A5000 + 7A1000 hardwares, specifies "rgmii-id" phy mode, which should be the one we are using. Add the lacking phy-handle property and set proper phy-mode. Tested on a LS3A4000_7A1000_NUC_BOARD_V2.1 board with YT8521S PHY. Signed-off-by: Icenowy Zheng Reviewed-by: Jiaxun Yang Signed-off-by: Thomas Bogendoerfer

mips: Add support for PC32 relocations in vmlinux

2026-01-22T22:58:17+00:00

MIPS supports PC32 relocations like most other architectures, which will be used by kallsyms to make its symbol references visible to the linker. Given that these are place-relative, they can be ignored by the 'relocs' tool, just like other PC type relocations. Signed-off-by: Ard Biesheuvel Link: https://patch.msgid.link/20260116093359.2442297-5-ardb+git@google.com Signed-off-by: Nathan Chancellor