<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/arch/mips/boot/dts, branch master</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=master</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=master'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2026-04-13T13:31:41+00:00</updated>
<entry>
<title>MIPS: Add Mobileye EyeQ6Lplus evaluation board dts</title>
<updated>2026-04-13T13:31:41+00:00</updated>
<author>
<name>Benoît Monin</name>
<email>benoit.monin@bootlin.com</email>
</author>
<published>2026-03-16T15:25:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=d024ba24ee6573da93eaa556d467828c5c7defd4'/>
<id>urn:sha1:d024ba24ee6573da93eaa556d467828c5c7defd4</id>
<content type='text'>
Add the device tree of the evaluation board of the EyeQ6Lplus SoC.

The board comes with 2GB of RAM and an SPI NAND connected to the octoSPI
controller The UART of the SoC is used as the serial console.

Signed-off-by: Benoît Monin &lt;benoit.monin@bootlin.com&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: Add Mobileye EyeQ6Lplus SoC dtsi</title>
<updated>2026-04-13T13:31:41+00:00</updated>
<author>
<name>Benoît Monin</name>
<email>benoit.monin@bootlin.com</email>
</author>
<published>2026-03-16T15:25:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=361600d16e3aba997ec5fa482732565580a948b4'/>
<id>urn:sha1:361600d16e3aba997ec5fa482732565580a948b4</id>
<content type='text'>
Add the device tree include files for the EyeQ6Lplus system on chip
from Mobileye.

Those files provide the initial support of the SoC:
* The I6500 CPU and GIC interrupt controller.
* The OLB ("Other Logic Block") providing clocks, resets and pin controls.
* One UART.
* One GPIO controller.
* Two SPI controllers, one in host mode and one in target mode.
* One octoSPI flash controller.
* Two I2C controllers.

Signed-off-by: Benoît Monin &lt;benoit.monin@bootlin.com&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: dts: loongson64g-package: Switch to Loongson UART driver</title>
<updated>2026-04-06T12:14:24+00:00</updated>
<author>
<name>Rong Zhang</name>
<email>rongrong@oss.cipunited.com</email>
</author>
<published>2026-03-15T18:44:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=79b888ee4c6387bc07c5452bfd031cb985871a5f'/>
<id>urn:sha1:79b888ee4c6387bc07c5452bfd031cb985871a5f</id>
<content type='text'>
Loongson64g is Loongson 3A4000, whose UART controller is compatible with
Loongson 2K1500, which is NS16550A-compatible with an additional
fractional frequency divisor register.

Update the compatible strings to reflect this, so that 3A4000 can
benefit from the fractional frequency divisor provided by loongson-uart.
This is required on some devices, otherwise their UART can't work at
some high baud rates, e.g., 115200.

Tested on Loongson-LS3A4000-7A1000-NUC-SE with a 25MHz UART clock.
Without fractional frequency divisor, the actual baud rate was 111607
(25MHz / 16 / 14, measured value: 111545) and some USB-to-UART
converters couldn't work with it at all. With fractional frequency
divisor, the measured baud rate becomes 115207, which is quite accurate.

Signed-off-by: Rong Zhang &lt;rongrong@oss.cipunited.com&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>mips: dts: Add PCIe to EcoNet EN751221</title>
<updated>2026-04-06T12:05:02+00:00</updated>
<author>
<name>Caleb James DeLisle</name>
<email>cjd@cjdns.fr</email>
</author>
<published>2026-03-09T13:18:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=c7dd395d7b53a66de8503507fe7ef21b8fab3e57'/>
<id>urn:sha1:c7dd395d7b53a66de8503507fe7ef21b8fab3e57</id>
<content type='text'>
Add PCIe based on EN7528 PCIe driver, also add two MT76 wifi devices
to SmartFiber XP8421-B.

Signed-off-by: Caleb James DeLisle &lt;cjd@cjdns.fr&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: mobileye: eyeq5-epm: add two Cadence GEM Ethernet PHYs</title>
<updated>2026-04-06T12:04:28+00:00</updated>
<author>
<name>Théo Lebrun</name>
<email>theo.lebrun@bootlin.com</email>
</author>
<published>2026-02-25T16:55:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=ff8efe28bb3a184422c71553675385625c710c10'/>
<id>urn:sha1:ff8efe28bb3a184422c71553675385625c710c10</id>
<content type='text'>
The Mobileye EyeQ5 eval board (EPM) embeds two MDIO PHYs.

Reviewed-by: Andrew Lunn &lt;andrew@lunn.ch&gt;
Acked-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
Signed-off-by: Théo Lebrun &lt;theo.lebrun@bootlin.com&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: mobileye: eyeq5: add two Cadence GEM Ethernet controllers</title>
<updated>2026-04-06T12:04:22+00:00</updated>
<author>
<name>Théo Lebrun</name>
<email>theo.lebrun@bootlin.com</email>
</author>
<published>2026-02-25T16:55:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=a692761a8e7b0c1abce92af476972357765f69c7'/>
<id>urn:sha1:a692761a8e7b0c1abce92af476972357765f69c7</id>
<content type='text'>
Add both MACB/GEM instances found in the Mobileye EyeQ5 SoC.

Acked-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
Signed-off-by: Théo Lebrun &lt;theo.lebrun@bootlin.com&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: Loongson64: dts: fix phy-related definition of LS7A GMAC</title>
<updated>2026-01-30T14:35:26+00:00</updated>
<author>
<name>Icenowy Zheng</name>
<email>zhengxingda@iscas.ac.cn</email>
</author>
<published>2026-01-02T15:52:43+00:00</published>
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<id>urn:sha1:e4ec36bf7bc7023e1d207b1277755b0da381f20f</id>
<content type='text'>
Currently the LS7A GMAC device tree node lacks a proper phy-handle
property pointing to the PHY node.

In addition, the phy-mode property specifies "rgmii" without any
internal delay information, which means the board trace needs to add 2ns
delay to the RGMII data lines; but that isn't known to happen on any
Loongson board. The ACPI-based initialization codepath, which is used on
LoongArch-based 3A5000 + 7A1000 hardwares, specifies "rgmii-id" phy
mode, which should be the one we are using.

Add the lacking phy-handle property and set proper phy-mode.

Tested on a LS3A4000_7A1000_NUC_BOARD_V2.1 board with YT8521S PHY.

Signed-off-by: Icenowy Zheng &lt;zhengxingda@iscas.ac.cn&gt;
Reviewed-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: dts: Always descend vendor subdirectories</title>
<updated>2025-12-01T09:06:16+00:00</updated>
<author>
<name>Rob Herring (Arm)</name>
<email>robh@kernel.org</email>
</author>
<published>2025-11-20T20:47:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=4f0b3cd7b664e662e9c4480e8d58574ece8aea57'/>
<id>urn:sha1:4f0b3cd7b664e662e9c4480e8d58574ece8aea57</id>
<content type='text'>
Commit 41528ba6afe6 ("MIPS: DTS: Only build subdir of current platform")
broke building of all DTBs when CONFIG_OF_ALL_DTBS is enabled unless all
the various kconfig options were also enabled. The only effect that commit
had was getting rid of some harmless build lines such as:

      AR      arch/mips/boot/dts/mti/built-in.a

Those lines were part of the built-in DTB support. Since commit
04e4ec98e405 ("MIPS: migrate to generic rule for built-in DTBs"), how the
built-in DTBs are handled has changed and those lines are no longer
generated, so revert to the prior behavior.

Signed-off-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>mips: dts: econet: fix EN751221 core type</title>
<updated>2025-11-11T11:59:30+00:00</updated>
<author>
<name>Aleksander Jan Bajkowski</name>
<email>olek2@wp.pl</email>
</author>
<published>2025-10-17T18:01:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=09782e72eec451fa14d327595f86cdc338ebe53c'/>
<id>urn:sha1:09782e72eec451fa14d327595f86cdc338ebe53c</id>
<content type='text'>
In fact, it is a multi-threaded MIPS34Kc, not a single-threaded MIPS24Kc.

Fixes: 0ec488700972 ("mips: dts: Add EcoNet DTS with EN751221 and SmartFiber XP8421-B board")
Signed-off-by: Aleksander Jan Bajkowski &lt;olek2@wp.pl&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: loongson: Add built-in DTB support</title>
<updated>2025-08-29T20:34:31+00:00</updated>
<author>
<name>Keguang Zhang</name>
<email>keguang.zhang@gmail.com</email>
</author>
<published>2025-07-16T11:25:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=ec7c2a107a59a60079eff3308e791a3441231f2e'/>
<id>urn:sha1:ec7c2a107a59a60079eff3308e791a3441231f2e</id>
<content type='text'>
Since the current bootloader for Loongson-1 does not support FDT,
introduce CONFIG_BUILTIN_DTB_NAME to enable a built-in DTB.

Signed-off-by: Keguang Zhang &lt;keguang.zhang@gmail.com&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
</feed>
