kernel/linux.git/arch/mips/bmips, branch v6.12.80

mips: bmips: setup: make CBR address configurable

2024-06-27T08:44:32+00:00

Add support to provide CBR address from DT to handle broken SoC/Bootloader that doesn't correctly init it. This permits to use the RAC flush even in these condition. To provide a CBR address from DT, the property "brcm,bmips-cbr-reg" needs to be set in the "cpus" node. On DT init, this property presence will be checked and will set the bmips_cbr_addr value accordingly. Also bmips_rac_flush_disable will be set to false as RAC flush can be correctly supported. The CBR address from DT will overwrite the cached one and the one set in the CBR register will be ignored. Also the DT CBR address is validated on being outside DRAM window. Signed-off-by: Christian Marangi Acked-by: Florian Fainelli Signed-off-by: Thomas Bogendoerfer

mips: bmips: rework and cache CBR addr handling

2024-06-27T08:44:24+00:00

Rework the handling of the CBR address and cache it. This address doesn't change and can be cached instead of reading the register every time. This is in preparation of permitting to tweak the CBR address in DT with broken SoC or bootloader. bmips_cbr_addr is defined in setup.c for each arch to keep compatibility with legacy brcm47xx/brcm63xx and generic BMIPS target. Acked-by: Florian Fainelli Signed-off-by: Christian Marangi Signed-off-by: Thomas Bogendoerfer

mips: bmips: BCM6358: make sure CBR is correctly set

2024-06-11T14:05:24+00:00

It was discovered that some device have CBR address set to 0 causing kernel panic when arch_sync_dma_for_cpu_all is called. This was notice in situation where the system is booted from TP1 and BMIPS_GET_CBR() returns 0 instead of a valid address and !!(read_c0_brcm_cmt_local() & (1 << 31)); not failing. The current check whether RAC flush should be disabled or not are not enough hence lets check if CBR is a valid address or not. Fixes: ab327f8acdf8 ("mips: bmips: BCM6358: disable RAC flush for TP1") Signed-off-by: Christian Marangi Acked-by: Florian Fainelli Signed-off-by: Thomas Bogendoerfer

MIPS: Explicitly include correct DT includes

2023-07-25T08:42:01+00:00

The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it was merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by: Rob Herring Signed-off-by: Thomas Bogendoerfer

mips: update a reference to a moved Arm Document

2023-06-13T09:47:20+00:00

Arm documentation has moved to Documentation/arch/arm; update a reference in arch/mips/bmips/setup.c to match. Cc: Thomas Bogendoerfer Cc: linux-mips@vger.kernel.org Acked-by: Florian Fainelli Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Jonathan Corbet

mips: bmips: BCM6358: disable RAC flush for TP1

2023-03-18T13:36:06+00:00

RAC flush causes kernel panics on BCM6358 with EHCI/OHCI when booting from TP1: [ 3.881739] usb 1-1: new high-speed USB device number 2 using ehci-platform [ 3.895011] Reserved instruction in kernel code[#1]: [ 3.900113] CPU: 0 PID: 1 Comm: init Not tainted 5.10.16 #0 [ 3.905829] $ 0 : 00000000 10008700 00000000 77d94060 [ 3.911238] $ 4 : 7fd1f088 00000000 81431cac 81431ca0 [ 3.916641] $ 8 : 00000000 ffffefff 8075cd34 00000000 [ 3.922043] $12 : 806f8d40 f3e812b7 00000000 000d9aaa [ 3.927446] $16 : 7fd1f068 7fd1f080 7ff559b8 81428470 [ 3.932848] $20 : 00000000 00000000 55590000 77d70000 [ 3.938251] $24 : 00000018 00000010 [ 3.943655] $28 : 81430000 81431e60 81431f28 800157fc [ 3.949058] Hi : 00000000 [ 3.952013] Lo : 00000000 [ 3.955019] epc : 80015808 setup_sigcontext+0x54/0x24c [ 3.960464] ra : 800157fc setup_sigcontext+0x48/0x24c [ 3.965913] Status: 10008703 KERNEL EXL IE [ 3.970216] Cause : 00800028 (ExcCode 0a) [ 3.974340] PrId : 0002a010 (Broadcom BMIPS4350) [ 3.979170] Modules linked in: ohci_platform ohci_hcd fsl_mph_dr_of ehci_platform ehci_fsl ehci_hcd gpio_button_hotplug usbcore nls_base usb_common [ 3.992907] Process init (pid: 1, threadinfo=(ptrval), task=(ptrval), tls=77e22ec8) [ 4.000776] Stack : 81431ef4 7fd1f080 81431f28 81428470 7fd1f068 81431edc 7ff559b8 81428470 [ 4.009467] 81431f28 7fd1f080 55590000 77d70000 77d5498c 80015c70 806f0000 8063ae74 [ 4.018149] 08100002 81431f28 0000000a 08100002 81431f28 0000000a 77d6b418 00000003 [ 4.026831] ffffffff 80016414 80080734 81431ecc 81431ecc 00000001 00000000 04000000 [ 4.035512] 77d54874 00000000 00000000 00000000 00000000 00000012 00000002 00000000 [ 4.044196] ... [ 4.046706] Call Trace: [ 4.049238] [<80015808>] setup_sigcontext+0x54/0x24c [ 4.054356] [<80015c70>] setup_frame+0xdc/0x124 [ 4.059015] [<80016414>] do_notify_resume+0x1dc/0x288 [ 4.064207] [<80011b50>] work_notifysig+0x10/0x18 [ 4.069036] [ 4.070538] Code: 8fc300b4 00001025 26240008 ac830004 3c048063 0c0228aa 24846a00 26240010 [ 4.080686] [ 4.082517] ---[ end trace 22a8edb41f5f983b ]--- [ 4.087374] Kernel panic - not syncing: Fatal exception [ 4.092753] Rebooting in 1 seconds.. Because the bootloader (CFE) is not initializing the Read-ahead cache properly on the second thread (TP1). Since the RAC was not initialized properly, we should avoid flushing it at the risk of corrupting the instruction stream as seen in the trace above. Fixes: d59098a0e9cb ("MIPS: bmips: use generic dma noncoherent ops") Signed-off-by: Álvaro Fernández Rojas Signed-off-by: Thomas Bogendoerfer

MIPS: BMIPS: Utilize cfe_die() for invalid DTB

2022-07-17T12:53:07+00:00

If we were not specified a correct DTB, we will not be able to print anything useful with panic() which requires a working console of some sort. Utilize cfe_die() to callback into the CFE default UART and print some useful diagnostics. Signed-off-by: Florian Fainelli Signed-off-by: Thomas Bogendoerfer

MIPS: bmips: Fix compiler warning observed on W=1 build

2022-05-23T16:28:03+00:00

The function arch_sync_dma_for_cpu_all() was used but was missing a prototype declaration. Signed-off-by: Jim Quinlan Reported-by: kernel test robot Acked-by: Florian Fainelli Signed-off-by: Thomas Bogendoerfer

MIPS: bmips: Remove obsolete DMA mapping support

2022-01-11T10:55:41+00:00

The code in 'arch/mips/bmips/dma.c' performed DMA mapping for inbound regions. This mapping was and is required for the Broadcom STB PCIe controller HW. This code is removed as the current 'struct device' has a @dma_range_map field which performs the same functionality by processing the "dma-ranges" DT property. Subsequently, ARCH_HAS_PHYS_TO_DMA is now unset since the dma_to_phys() and phys_to_dma() functions are removed. Signed-off-by: Jim Quinlan Acked-by: Florian Fainelli Signed-off-by: Thomas Bogendoerfer

MIPS: bmips: include for phys_to_dma

2021-03-06T07:43:40+00:00

Ensure this file has a prototype for phys_to_dma and dma_to_phys. Signed-off-by: Christoph Hellwig Acked-by: Florian Fainelli Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Thomas Bogendoerfer