<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/arch/mips/alchemy/common/time.c, branch linux-7.0.y</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=linux-7.0.y</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=linux-7.0.y'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2020-03-05T15:47:35+00:00</updated>
<entry>
<title>MIPS: Replace setup_irq() by request_irq()</title>
<updated>2020-03-05T15:47:35+00:00</updated>
<author>
<name>afzal mohammed</name>
<email>afzal.mohd.ma@gmail.com</email>
</author>
<published>2020-03-05T11:57:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=ac8fd122e070ce0e60c608d4f085f7af77290844'/>
<id>urn:sha1:ac8fd122e070ce0e60c608d4f085f7af77290844</id>
<content type='text'>
request_irq() is preferred over setup_irq(). Invocations of setup_irq()
occur after memory allocators are ready.

Per tglx[1], setup_irq() existed in olden days when allocators were not
ready by the time early interrupts were initialized.

Hence replace setup_irq() by request_irq().

remove_irq() has been replaced by free_irq() as well.

There were build error's during previous version, couple of which was
reported by kbuild test robot &lt;lkp@intel.com&gt; of which one was reported
by Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt; as well. There were a
few more issues including build errors, those also have been fixed.

[1] https://lkml.kernel.org/r/alpine.DEB.2.20.1710191609480.1971@nanos

Signed-off-by: afzal mohammed &lt;afzal.mohd.ma@gmail.com&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 182</title>
<updated>2019-05-30T18:29:20+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2019-05-28T16:57:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=41173abc577b71e5ffa9d1f09b0c1a983526fa51'/>
<id>urn:sha1:41173abc577b71e5ffa9d1f09b0c1a983526fa51</id>
<content type='text'>
Based on 1 normalized pattern(s):

  this program is free software you can distribute it and or modify it
  under the terms of the gnu general public license version 2 as
  published by the free software foundation this program is
  distributed in the hope it will be useful but without any warranty
  without even the implied warranty of merchantability or fitness for
  a particular purpose see the gnu general public license for more
  details you should have received a copy of the gnu general public
  license along with this program if not write to the free software
  foundation inc 59 temple place suite 330 boston ma 02111 1307 usa

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 32 file(s).

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Allison Randal &lt;allison@lohutok.net&gt;
Reviewed-by: Richard Fontana &lt;rfontana@redhat.com&gt;
Reviewed-by: Steve Winslow &lt;swinslow@gmail.com&gt;
Reviewed-by: Alexios Zavras &lt;alexios.zavras@intel.com&gt;
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190528170026.531157061@linutronix.de
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>MIPS: alchemy: cpu_all_mask is forbidden for clock event devices</title>
<updated>2018-12-23T15:58:18+00:00</updated>
<author>
<name>Manuel Lauss</name>
<email>manuel.lauss@gmail.com</email>
</author>
<published>2018-12-19T07:07:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=bbb8a75208937beee3bba746da7addb194588619'/>
<id>urn:sha1:bbb8a75208937beee3bba746da7addb194588619</id>
<content type='text'>
change alchemy clock event device cpu_all_mask to cpu_possible_mask.
Gets rid of a warning, which then does the same substitution:
WARNING: CPU: 0 PID: 0 at kernel/time/clockevents.c:468 clockevents_register_device+0x130/0x140
rtcmatch2 cpumask == cpu_all_mask, using cpu_possible_mask instead

Signed-off-by: Manuel Lauss &lt;manuel.lauss@gmail.com&gt;
Signed-off-by: Paul Burton &lt;paul.burton@mips.com&gt;
Cc: Linux-MIPS &lt;linux-mips@vger.kernel.org&gt;
</content>
</entry>
<entry>
<title>MIPS: clockevent drivers: Set -&gt;min_delta_ticks and -&gt;max_delta_ticks</title>
<updated>2017-04-14T20:11:16+00:00</updated>
<author>
<name>Nicolai Stange</name>
<email>nicstange@gmail.com</email>
</author>
<published>2017-03-30T19:47:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=e4db9253d6b4c1d927254f1c4bef875573229502'/>
<id>urn:sha1:e4db9253d6b4c1d927254f1c4bef875573229502</id>
<content type='text'>
In preparation for making the clockevents core NTP correction aware,
all clockevent device drivers must set -&gt;min_delta_ticks and
-&gt;max_delta_ticks rather than -&gt;min_delta_ns and -&gt;max_delta_ns: a
clockevent device's rate is going to change dynamically and thus, the
ratio of ns to ticks ceases to stay invariant.

Make the MIPS arch's clockevent drivers initialize these fields properly.

This patch alone doesn't introduce any change in functionality as the
clockevents core still looks exclusively at the (untouched) -&gt;min_delta_ns
and -&gt;max_delta_ns. As soon as this has changed, a followup patch will
purge the initialization of -&gt;min_delta_ns and -&gt;max_delta_ns from these
drivers.

Cc: Ingo Molnar &lt;mingo@redhat.com&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Cc: Richard Cochran &lt;richardcochran@gmail.com&gt;
Cc: Prarit Bhargava &lt;prarit@redhat.com&gt;
Cc: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Cc: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Cc: Keguang Zhang &lt;keguang.zhang@gmail.com&gt;
Cc: John Crispin &lt;john@phrozen.org&gt;
Acked-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Signed-off-by: Nicolai Stange &lt;nicstange@gmail.com&gt;
Signed-off-by: John Stultz &lt;john.stultz@linaro.org&gt;
</content>
</entry>
<entry>
<title>clocksource: Use a plain u64 instead of cycle_t</title>
<updated>2016-12-25T10:04:12+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2016-12-21T19:32:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=a5a1d1c2914b5316924c7893eb683a5420ebd3be'/>
<id>urn:sha1:a5a1d1c2914b5316924c7893eb683a5420ebd3be</id>
<content type='text'>
There is no point in having an extra type for extra confusion. u64 is
unambiguous.

Conversion was done with the following coccinelle script:

@rem@
@@
-typedef u64 cycle_t;

@fix@
typedef cycle_t;
@@
-cycle_t
+u64

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: John Stultz &lt;john.stultz@linaro.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Alchemy: Migrate to new 'set-state' interface</title>
<updated>2015-09-03T10:07:50+00:00</updated>
<author>
<name>Viresh Kumar</name>
<email>viresh.kumar@linaro.org</email>
</author>
<published>2015-07-06T11:11:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=3dcd7779ac4dada4a2c97e19a9ac3593891d89a0'/>
<id>urn:sha1:3dcd7779ac4dada4a2c97e19a9ac3593891d89a0</id>
<content type='text'>
Migrate alchemy driver to the new 'set-state' interface provided by
clockevents core, the earlier 'set-mode' interface is marked obsolete
now.

This also enables us to implement callbacks for new states of clockevent
devices, for example: ONESHOT_STOPPED.

We weren't doing anything in the -&gt;set_mode() callback. So, this patch
doesn't provide any set-state callbacks.

Signed-off-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
Cc: Manuel Lauss &lt;manuel.lauss@gmail.com&gt;
Cc: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Cc: linux-mips@linux-mips.org
Cc: linaro-kernel@lists.linaro.org
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Patchwork: https://patchwork.linux-mips.org/patch/10599/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Alchemy: introduce helpers to access SYS register block.</title>
<updated>2014-07-30T11:53:28+00:00</updated>
<author>
<name>Manuel Lauss</name>
<email>manuel.lauss@gmail.com</email>
</author>
<published>2014-07-23T14:36:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=1d09de7dc76ef96a9a2c7c0244e20f12d68e6ef8'/>
<id>urn:sha1:1d09de7dc76ef96a9a2c7c0244e20f12d68e6ef8</id>
<content type='text'>
This patch changes all absolute SYS_XY registers to offsets from the
SYS block base, prefixes them with AU1000 to avoid silent failures due
to changed addresses, and introduces helper functions to read/write
them.

No functional changes, comparing assembly of a few select functions shows
no differences.

Signed-off-by: Manuel Lauss &lt;manuel.lauss@gmail.com&gt;
Cc: Linux-MIPS &lt;linux-mips@linux-mips.org&gt;
Patchwork: https://patchwork.linux-mips.org/patch/7464/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Idle: Consolidate all declarations in &lt;asm/idle.h&gt;.</title>
<updated>2013-05-21T23:34:27+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2013-05-21T14:59:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=bdc92d74e0ec95a8101447467c25f015105f2e5a'/>
<id>urn:sha1:bdc92d74e0ec95a8101447467c25f015105f2e5a</id>
<content type='text'>
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Whitespace cleanup.</title>
<updated>2013-02-01T09:00:22+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2013-01-22T11:59:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=7034228792cc561e79ff8600f02884bd4c80e287'/>
<id>urn:sha1:7034228792cc561e79ff8600f02884bd4c80e287</id>
<content type='text'>
Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Alchemy: Make 32kHz and r4k timer coexist peacefully</title>
<updated>2012-12-27T15:27:35+00:00</updated>
<author>
<name>Manuel Lauss</name>
<email>manuel.lauss@gmail.com</email>
</author>
<published>2012-12-17T06:14:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=8e0d7372f595c254d83316fba1530164010f7b33'/>
<id>urn:sha1:8e0d7372f595c254d83316fba1530164010f7b33</id>
<content type='text'>
Now that the r4k timer is registered no matter what, bump the rating of
the Alchemy 32kHz timer so that it gets used when it is working,
and fall back on the r4k when it isn't.

This fixes a timer-related hang on platform with a working 32kHz timer
(the better rated c0 timer stops while executing 'wait' leading to (almost)
eternal sleep) and an oops on boot on platforms without a working 32kHz
timer (due to double registration of the r4k timer).

Signed-off-by: Manuel Lauss &lt;manuel.lauss@gmail.com&gt;
Cc:  Linux-MIPS &lt;linux-mips@linux-mips.org&gt;
Patchwork: https://patchwork.linux-mips.org/patch/4728/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
</feed>
