kernel/linux.git/arch/microblaze/include/asm/cache.h, branch v6.12.80

microblaze: move the ARCH_{DMA,SLAB}_MINALIGN definitions to asm/cache.h

2023-06-19T23:19:24+00:00

The microblaze architecture defines ARCH_DMA_MINALIGN in asm/page.h. Move it to asm/cache.h to allow a generic ARCH_DMA_MINALIGN definition in linux/cache.h without redefine errors/warnings. While at it, also move ARCH_SLAB_MINALIGN to asm/cache.h for consistency. Link: https://lkml.kernel.org/r/20230613155245.1228274-3-catalin.marinas@arm.com Signed-off-by: Catalin Marinas Cc: Michal Simek Cc: Christophe Leroy Cc: John Paul Adrian Glaubitz Cc: kernel test robot Cc: Michael Ellerman Cc: Nicholas Piggin Cc: Rich Felker Cc: Vlastimil Babka Cc: Yoshinori Sato Signed-off-by: Andrew Morton

microblaze: Convert headers to SPDX license

2020-02-25T11:33:19+00:00

Covert all headers to SPDX. Signed-off-by: Michal Simek Reviewed-by: Stefan Asserhall Reviewed-by: Arnd Bergmann

microblaze: Define correct L1_CACHE_SHIFT value

2010-05-06T09:21:59+00:00

Microblaze cacheline length is configurable and current cpu uses two cacheline length 4 and 8. We are taking conservative maximum value to be sure that cacheline alignment is satisfied for all cases. Here is the calculation for cacheline lenght 8 32bit=4Byte values which is corresponding with SHIFT 5. Signed-off-by: Michal Simek

microblaze: Move cache macro from cache.h to cacheflush.h

2009-12-14T07:45:00+00:00

Signed-off-by: Michal Simek

microblaze: Remove uncache shadow condition

2009-04-23T14:09:16+00:00

Uncached shadow feature is not supported in current kernel code that's why I removed it. Signed-off-by: Michal Simek

microblaze_v8: cache support

2009-03-27T13:25:16+00:00

Reviewed-by: Ingo Molnar Acked-by: Stephen Neuendorffer Acked-by: John Linn Acked-by: John Williams Signed-off-by: Michal Simek