Linux kernel stable tree (mirror) https://git.radix-linux.su/kernel/linux.git/atom?h=v6.6.141 2026-02-19T15:28:26+00:00 2026-02-19T15:28:26+00:00 Huacai Chen chenhuacai@loongson.cn 2024-07-20T14:40:59+00:00 urn:sha1:f42a2d49c46526cdfbfba95a61dd2caac69aff9b commit 8e02c3b782ec64343f3cccc8dc5a8be2b379e80b upstream. Currently, only TLB-based ioremap() support writecombine, so add the counterpart for DMW-based ioremap() with help of DMW2. The base address (WRITECOMBINE_BASE) is configured as 0xa000000000000000. DMW3 is unused by kernel now, however firmware may leave garbage in them and interfere kernel's address mapping. So clear it as necessary. BTW, centralize the DMW configuration to macro SETUP_DMWINS. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 2024-06-16T11:47:39+00:00 Jiaxun Yang jiaxun.yang@flygoat.com 2024-06-03T07:45:53+00:00 urn:sha1:ca6d6d872a8b74e72cba8f1dbbc76229f375304b commit 1098efd299ffe9c8af818425338c7f6c4f930a98 upstream. In JUMP_VIRT_ADDR we are performing an or calculation on address value directly from pcaddi. This will only work if we are currently running from direct 1:1 mapping addresses or firmware's DMW is configured exactly same as kernel. Still, we should not rely on such assumption. Fix by overriding higher bits in address comes from pcaddi, so we can get rid of or operator. Cc: stable@vger.kernel.org Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 2023-09-06T14:53:55+00:00 Qing Zhang zhangqing@loongson.cn 2023-09-06T14:53:55+00:00 urn:sha1:e14dd076964ef11e9d6e3b06a2f1c6bb7d034133 KGDB is intended to be used as a source level debugger for the Linux kernel. It is used along with gdb to debug a Linux kernel. GDB can be used to "break in" to the kernel to inspect memory, variables and regs similar to the way an application developer would use GDB to debug an application. KDB is a frontend of KGDB which is similar to GDB. By now, in addition to the generic KGDB features, the LoongArch KGDB implements the following features: - Hardware breakpoints/watchpoints; - Software single-step support for KDB. Signed-off-by: Qing Zhang <zhangqing@loongson.cn> # Framework & CoreFeature Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> # BreakPoint & SingleStep Signed-off-by: Hui Li <lihui@loongson.cn> # Some Minor Improvements Signed-off-by: Randy Dunlap <rdunlap@infradead.org> # Some Build Error Fixes Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> 2023-02-25T14:12:16+00:00 Youling Tang tangyouling@loongson.cn 2023-02-25T07:52:56+00:00 urn:sha1:396233c650084cb957eb6d87dd4abd3e56a7d499 Use the "la_abs macro" instead of the "la.abs pseudo instruction" to prepare for the subsequent PIE kernel. When PIE is not enabled, la_abs is equivalent to la.abs. Signed-off-by: Youling Tang <tangyouling@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> 2023-02-25T14:12:16+00:00 Youling Tang tangyouling@loongson.cn 2023-02-25T07:52:56+00:00 urn:sha1:8cbd5ebfe241699288cb152081854414f6265718 Add JUMP_VIRT_ADDR macro implementation to avoid using la.abs directly. This is a preparation for subsequent patches. Signed-off-by: Youling Tang <tangyouling@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> 2023-02-25T14:12:16+00:00 Xi Ruoyao xry111@xry111.site 2023-02-25T07:52:56+00:00 urn:sha1:f733f119e9b31088063652a7ad16963d85cb73dd Let's start to kill la.abs in preparation for the subsequent support of the PIE kernel. BTW, Re-tab the indention in arch/loongarch/kernel/entry.S for alignment. Signed-off-by: Xi Ruoyao <xry111@xry111.site> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> 2022-06-03T12:09:29+00:00 Huacai Chen chenhuacai@loongson.cn 2022-05-31T10:04:12+00:00 urn:sha1:46859ac8af52ae599e1b51992ddef3eb43f295fc LoongArch-based procesors have 4, 8 or 16 cores per package. This patch adds multi-processor (SMP) support for LoongArch. Reviewed-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> 2022-06-03T12:09:28+00:00 Huacai Chen chenhuacai@loongson.cn 2022-05-31T10:04:11+00:00 urn:sha1:0603839b18f4fb3bffa82515efcf5b02084505ef Add the exception and interrupt handling machanism for basic LoongArch support. Reviewed-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>