<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/arch/arm64/include/asm/kvm_hyp.h, branch linux-7.0.y</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=linux-7.0.y</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=linux-7.0.y'/>
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<updated>2025-11-24T22:29:14+00:00</updated>
<entry>
<title>KVM: arm64: GICv3: nv: Resync LRs/VMCR/HCR early for better MI emulation</title>
<updated>2025-11-24T22:29:14+00:00</updated>
<author>
<name>Marc Zyngier</name>
<email>maz@kernel.org</email>
</author>
<published>2025-11-20T17:25:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=eb33ffa2bd3f1842d2960aff7484869fc64aa2fb'/>
<id>urn:sha1:eb33ffa2bd3f1842d2960aff7484869fc64aa2fb</id>
<content type='text'>
The current approach to nested GICv3 support is to not do anything
while L2 is running, wait a transition from L2 to L1 to resync
LRs, VMCR and HCR, and only then evaluate the state to decide
whether to generate a maintenance interrupt.

This doesn't provide a good quality of emulation, and it would be
far preferable to find out early that we need to perform a switch.

Move the LRs/VMCR and HCR resync into vgic_v3_sync_nested(), so
that we have most of the state available. As we turning the vgic
off at this stage to avoid a screaming host MI, add a new helper
vgic_v3_flush_nested() that switches the vgic on again. The MI can
then be directly injected as required.

Tested-by: Fuad Tabba &lt;tabba@google.com&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Tested-by: Mark Brown &lt;broonie@kernel.org&gt;
Link: https://msgid.link/20251120172540.2267180-35-maz@kernel.org
Signed-off-by: Oliver Upton &lt;oupton@kernel.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm64: Eagerly save VMCR on exit</title>
<updated>2025-11-24T22:29:13+00:00</updated>
<author>
<name>Marc Zyngier</name>
<email>maz@kernel.org</email>
</author>
<published>2025-11-20T17:25:10+00:00</published>
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<id>urn:sha1:cf72ee63711916ad808f82eb054dd9d69727a5bf</id>
<content type='text'>
We currently save/restore the VMCR register in a pretty lazy way
(on load/put, consistently with what we do with the APRs).

However, we are going to need the group-enable bits that are backed
by VMCR on each entry (so that we can avoid injecting interrupts for
disabled groups).

Move the synchronisation from put to sync, which results in some minor
churn in the nVHE hypercalls to simplify things.

Tested-by: Fuad Tabba &lt;tabba@google.com&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Tested-by: Mark Brown &lt;broonie@kernel.org&gt;
Link: https://msgid.link/20251120172540.2267180-21-maz@kernel.org
Signed-off-by: Oliver Upton &lt;oupton@kernel.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm64: nv: Nested GICv3 emulation</title>
<updated>2025-03-03T22:57:04+00:00</updated>
<author>
<name>Marc Zyngier</name>
<email>maz@kernel.org</email>
</author>
<published>2025-02-25T17:29:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=146a050f2d8c4394dfe3e236dc49d155fd5c04d1'/>
<id>urn:sha1:146a050f2d8c4394dfe3e236dc49d155fd5c04d1</id>
<content type='text'>
When entering a nested VM, we set up the hypervisor control interface
based on what the guest hypervisor has set. Especially, we investigate
each list register written by the guest hypervisor whether HW bit is
set.  If so, we translate hw irq number from the guest's point of view
to the real hardware irq number if there is a mapping.

Co-developed-by: Jintack Lim &lt;jintack@cs.columbia.edu&gt;
Signed-off-by: Jintack Lim &lt;jintack@cs.columbia.edu&gt;
[Christoffer: Redesigned execution flow around vcpu load/put]
Co-developed-by: Christoffer Dall &lt;christoffer.dall@arm.com&gt;
Signed-off-by: Christoffer Dall &lt;christoffer.dall@arm.com&gt;
[maz: Rewritten to support GICv3 instead of GICv2, NV2 support]
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://lore.kernel.org/r/20250225172930.1850838-9-maz@kernel.org
Signed-off-by: Oliver Upton &lt;oliver.upton@linux.dev&gt;
</content>
</entry>
<entry>
<title>KVM: arm64: Fix __pkvm_init_switch_pgd call ABI</title>
<updated>2024-06-20T17:40:53+00:00</updated>
<author>
<name>Pierre-Clément Tosi</name>
<email>ptosi@google.com</email>
</author>
<published>2024-06-10T06:32:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=ea9d7c83d14e332db9ae25eb2872b90a06ebc9e6'/>
<id>urn:sha1:ea9d7c83d14e332db9ae25eb2872b90a06ebc9e6</id>
<content type='text'>
Fix the mismatch between the (incorrect) C signature, C call site, and
asm implementation by aligning all three on an API passing the
parameters (pgd and SP) separately, instead of as a bundled struct.

Remove the now unnecessary memory accesses while the MMU is off from the
asm, which simplifies the C caller (as it does not need to convert a VA
struct pointer to PA) and makes the code slightly more robust by
offsetting the struct fields from C and properly expressing the call to
the C compiler (e.g. type checker and kCFI).

Fixes: f320bc742bc2 ("KVM: arm64: Prepare the creation of s1 mappings at EL2")
Signed-off-by: Pierre-Clément Tosi &lt;ptosi@google.com&gt;
Acked-by: Will Deacon &lt;will@kernel.org&gt;
Link: https://lore.kernel.org/r/20240610063244.2828978-3-ptosi@google.com
Signed-off-by: Oliver Upton &lt;oliver.upton@linux.dev&gt;
</content>
</entry>
<entry>
<title>KVM: arm64: Allocate memory mapped at hyp for host sve state in pKVM</title>
<updated>2024-06-04T14:06:33+00:00</updated>
<author>
<name>Fuad Tabba</name>
<email>tabba@google.com</email>
</author>
<published>2024-06-03T12:28:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=66d5b53e20a6e00b7ce3b652a3e2db967f7b33d0'/>
<id>urn:sha1:66d5b53e20a6e00b7ce3b652a3e2db967f7b33d0</id>
<content type='text'>
Protected mode needs to maintain (save/restore) the host's sve
state, rather than relying on the host kernel to do that. This is
to avoid leaking information to the host about guests and the
type of operations they are performing.

As a first step towards that, allocate memory mapped at hyp, per
cpu, for the host sve state. The following patch will use this
memory to save/restore the host state.

Reviewed-by: Oliver Upton &lt;oliver.upton@linux.dev&gt;
Signed-off-by: Fuad Tabba &lt;tabba@google.com&gt;
Link: https://lore.kernel.org/r/20240603122852.3923848-6-tabba@google.com
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm64: Fix prototype for __sve_save_state/__sve_restore_state</title>
<updated>2024-06-04T14:06:32+00:00</updated>
<author>
<name>Fuad Tabba</name>
<email>tabba@google.com</email>
</author>
<published>2024-06-03T12:28:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=45f4ea9bcfe909b3461059990b1e232e55dde809'/>
<id>urn:sha1:45f4ea9bcfe909b3461059990b1e232e55dde809</id>
<content type='text'>
Since the prototypes for __sve_save_state/__sve_restore_state at
hyp were added, the underlying macro has acquired a third
parameter for saving/restoring ffr.

Fix the prototypes to account for the third parameter, and
restore the ffr for the guest since it is saved.

Suggested-by: Mark Brown &lt;broonie@kernel.org&gt;
Signed-off-by: Fuad Tabba &lt;tabba@google.com&gt;
Reviewed-by: Mark Brown &lt;broonie@kernel.org&gt;
Link: https://lore.kernel.org/r/20240603122852.3923848-3-tabba@google.com
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm64: Reintroduce __sve_save_state</title>
<updated>2024-06-04T14:06:32+00:00</updated>
<author>
<name>Fuad Tabba</name>
<email>tabba@google.com</email>
</author>
<published>2024-06-03T12:28:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=87bb39ed40bdf1596b8820e800226e24eb642677'/>
<id>urn:sha1:87bb39ed40bdf1596b8820e800226e24eb642677</id>
<content type='text'>
Now that the hypervisor is handling the host sve state in
protected mode, it needs to be able to save it.

This reverts commit e66425fc9ba3 ("KVM: arm64: Remove unused
__sve_save_state").

Reviewed-by: Oliver Upton &lt;oliver.upton@linux.dev&gt;
Signed-off-by: Fuad Tabba &lt;tabba@google.com&gt;
Link: https://lore.kernel.org/r/20240603122852.3923848-2-tabba@google.com
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm64: Simplify vgic-v3 hypercalls</title>
<updated>2024-05-01T15:48:14+00:00</updated>
<author>
<name>Marc Zyngier</name>
<email>maz@kernel.org</email>
</author>
<published>2024-04-23T15:05:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=948e1a53c2e95ad4c03cc6201edcb5d92e87d841'/>
<id>urn:sha1:948e1a53c2e95ad4c03cc6201edcb5d92e87d841</id>
<content type='text'>
Consolidate the GICv3 VMCR accessor hypercalls into the APR save/restore
hypercalls so that all of the EL2 GICv3 state is covered by a single pair
of hypercalls.

Signed-off-by: Fuad Tabba &lt;tabba@google.com&gt;
Acked-by: Oliver Upton &lt;oliver.upton@linux.dev&gt;
Link: https://lore.kernel.org/r/20240423150538.2103045-17-tabba@google.com
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm64: Fix typos</title>
<updated>2024-02-24T09:13:33+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2024-01-03T23:16:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=75841d89f3ed51ba1ee5fd341488fe1f55f4eb06'/>
<id>urn:sha1:75841d89f3ed51ba1ee5fd341488fe1f55f4eb06</id>
<content type='text'>
Fix typos, most reported by "codespell arch/arm64".  Only touches comments,
no code changes.

Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Cc: James Morse &lt;james.morse@arm.com&gt;
Cc: Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;
Cc: Zenghui Yu &lt;yuzenghui@huawei.com&gt;
Cc: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Cc: Will Deacon &lt;will@kernel.org&gt;
Cc: linux-arm-kernel@lists.infradead.org
Cc: kvmarm@lists.linux.dev
Reviewed-by: Zenghui Yu &lt;yuzenghui@huawei.com&gt;
Reviewed-by: Randy Dunlap &lt;rdunlap@infradead.org&gt;
Link: https://lore.kernel.org/r/20240103231605.1801364-6-helgaas@kernel.org
Signed-off-by: Oliver Upton &lt;oliver.upton@linux.dev&gt;
</content>
</entry>
<entry>
<title>KVM: arm64: Rename helpers for VHE vCPU load/put</title>
<updated>2023-10-20T17:52:01+00:00</updated>
<author>
<name>Oliver Upton</name>
<email>oliver.upton@linux.dev</email>
</author>
<published>2023-10-18T23:32:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=27cde4c0fe28eab228d1fc9d84c68a109219887d'/>
<id>urn:sha1:27cde4c0fe28eab228d1fc9d84c68a109219887d</id>
<content type='text'>
The names for the helpers we expose to the 'generic' KVM code are a bit
imprecise; we switch the EL0 + EL1 sysreg context and setup trap
controls that do not need to change for every guest entry/exit. Rename +
shuffle things around a bit in preparation for loading the stage-2 MMU
context on vcpu_load().

Link: https://lore.kernel.org/r/20231018233212.2888027-5-oliver.upton@linux.dev
Signed-off-by: Oliver Upton &lt;oliver.upton@linux.dev&gt;
</content>
</entry>
</feed>
