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<title>kernel/linux.git/arch/arm64/boot, branch v6.12.80</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.12.80</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v6.12.80'/>
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<updated>2026-04-02T11:09:48+00:00</updated>
<entry>
<title>arm64: dts: imx8mn-tqma8mqnl: fix LDO5 power off</title>
<updated>2026-04-02T11:09:48+00:00</updated>
<author>
<name>Markus Niebel</name>
<email>Markus.Niebel@ew.tq-group.com</email>
</author>
<published>2025-12-16T13:39:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=95a16dcb49227e7795d992660fed0ceb0ac14d25'/>
<id>urn:sha1:95a16dcb49227e7795d992660fed0ceb0ac14d25</id>
<content type='text'>
commit 8adc841d43ebceabec996c9dcff6e82d3e585268 upstream.

Fix SD card removal caused by automatic LDO5 power off after boot

To prevent this, add vqmmc regulator for USDHC, using a GPIO-controlled
regulator that is supplied by LDO5. Since this is implemented on SoM but
used on baseboards with SD-card interface, implement the functionality
on SoM part and optionally enable it on baseboards if needed.

Signed-off-by: Markus Niebel &lt;Markus.Niebel@ew.tq-group.com&gt;
Signed-off-by: Alexander Stein &lt;alexander.stein@ew.tq-group.com&gt;
Signed-off-by: Shawn Guo &lt;shawnguo@kernel.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>arm64: dts: renesas: r9a09g057: Remove wdt{0,2,3} nodes</title>
<updated>2026-03-25T10:08:51+00:00</updated>
<author>
<name>Fabrizio Castro</name>
<email>fabrizio.castro.jz@renesas.com</email>
</author>
<published>2026-02-03T12:42:46+00:00</published>
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<id>urn:sha1:b82eac7a1a38f8bf9b26118fcac82ea8951ac283</id>
<content type='text'>
[ Upstream commit a3f34651de4287138c0da19ba321ad72622b4af3 ]

The HW user manual for the Renesas RZ/V2H(P) SoC (a.k.a r9a09g057)
states that only WDT1 is supposed to be accessed by the CA55 cores.
WDT0 is supposed to be used by the CM33 core, WDT2 is supposed
to be used by the CR8 core 0, and WDT3 is supposed to be used
by the CR8 core 1.

Remove wdt{0,2,3} from the SoC specific device tree to make it
compliant with the specification from the HW manual.

This change is harmless as there are currently no users of the
wdt{0,2,3} device tree nodes, only the wdt1 node is actually used.

Fixes: 095105496e7d ("arm64: dts: renesas: r9a09g057: Add WDT0-WDT3 nodes")
Signed-off-by: Fabrizio Castro &lt;fabrizio.castro.jz@renesas.com&gt;
Reviewed-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Link: https://patch.msgid.link/20260203124247.7320-3-fabrizio.castro.jz@renesas.com
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>arm64: dts: renesas: r9a09g057: Add RTC node</title>
<updated>2026-03-25T10:08:51+00:00</updated>
<author>
<name>Ovidiu Panait</name>
<email>ovidiu.panait.rb@renesas.com</email>
</author>
<published>2025-11-07T21:07:05+00:00</published>
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<id>urn:sha1:d82a0f77999fbc2e1394a4265cc3332ad63ee137</id>
<content type='text'>
[ Upstream commit cfc733da4e79018f88d8ac5f3a5306abbba8ef89 ]

Add RTC node to Renesas RZ/V2H ("R9A09G057") SoC DTSI.

Signed-off-by: Ovidiu Panait &lt;ovidiu.panait.rb@renesas.com&gt;
Reviewed-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Link: https://patch.msgid.link/20251107210706.45044-4-ovidiu.panait.rb@renesas.com
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Stable-dep-of: a3f34651de42 ("arm64: dts: renesas: r9a09g057: Remove wdt{0,2,3} nodes")
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>Revert "arm64: dts: qcom: sdm845-oneplus: Mark l14a regulator as boot-on"</title>
<updated>2026-03-25T10:08:30+00:00</updated>
<author>
<name>Sasha Levin</name>
<email>sashal@kernel.org</email>
</author>
<published>2026-03-15T07:16:41+00:00</published>
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<id>urn:sha1:ba76b18d8d2c8f196613df6711e08195ee682d05</id>
<content type='text'>
This reverts commit a7037c3eb0130a6167138e69178895b22758d7f3.

The backport applied regulator-boot-on to vreg_l12a_1p8 (ldo12) instead
of vreg_l14a_1p88 (ldo14) due to identical surrounding context lines.

Reported-by: Marco Mattiolo &lt;marco.mattiolo@hotmail.it&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>arm64: dts: rockchip: Fix rk3588 PCIe range mappings</title>
<updated>2026-03-13T16:20:26+00:00</updated>
<author>
<name>Shawn Lin</name>
<email>shawn.lin@rock-chips.com</email>
</author>
<published>2026-01-05T08:15:29+00:00</published>
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<id>urn:sha1:76cce803bf51e9401d289430ccb213213ae55add</id>
<content type='text'>
[ Upstream commit 46c56b737161060dfa468f25ae699749047902a2 ]

The pcie bus address should be mapped 1:1 to the cpu side MMIO address, so
that there is no same address allocated from normal system memory. Otherwise
it's broken if the same address assigned to the EP for DMA purpose.Fix it to
sync with the vendor BSP.

Fixes: 0acf4fa7f187 ("arm64: dts: rockchip: add PCIe3 support for rk3588")
Fixes: 8d81b77f4c49 ("arm64: dts: rockchip: add rk3588 PCIe2 support")
Cc: stable@vger.kernel.org
Cc: Sebastian Reichel &lt;sebastian.reichel@collabora.com&gt;
Signed-off-by: Shawn Lin &lt;shawn.lin@rock-chips.com&gt;
Link: https://patch.msgid.link/1767600929-195341-2-git-send-email-shawn.lin@rock-chips.com
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>arm64: dts: rockchip: Fix rk356x PCIe range mappings</title>
<updated>2026-03-13T16:20:26+00:00</updated>
<author>
<name>Shawn Lin</name>
<email>shawn.lin@rock-chips.com</email>
</author>
<published>2026-01-05T08:15:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=497b04231b8ff171ac81c85cbeacd1a9ff5089f0'/>
<id>urn:sha1:497b04231b8ff171ac81c85cbeacd1a9ff5089f0</id>
<content type='text'>
[ Upstream commit f63ea193a404481f080ca2958f73e9f364682db9 ]

The pcie bus address should be mapped 1:1 to the cpu side MMIO address, so
that there is no same address allocated from normal system memory. Otherwise
it's broken if the same address assigned to the EP for DMA purpose.Fix it to
sync with the vendor BSP.

Fixes: 568a67e742df ("arm64: dts: rockchip: Fix rk356x PCIe register and range mappings")
Fixes: 66b51ea7d70f ("arm64: dts: rockchip: Add rk3568 PCIe2x1 controller")
Cc: stable@vger.kernel.org
Cc: Andrew Powers-Holmes &lt;aholmes@omnom.net&gt;
Signed-off-by: Shawn Lin &lt;shawn.lin@rock-chips.com&gt;
Link: https://patch.msgid.link/1767600929-195341-1-git-send-email-shawn.lin@rock-chips.com
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>arm64: dts: rockchip: Do not enable hdmi_sound node on Pinebook Pro</title>
<updated>2026-03-04T12:21:46+00:00</updated>
<author>
<name>Jun Yan</name>
<email>jerrysteve1101@gmail.com</email>
</author>
<published>2026-01-16T15:12:53+00:00</published>
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<id>urn:sha1:63922c96e13754a0e0cd7f5c06ac92536b6feb03</id>
<content type='text'>
[ Upstream commit b18247f9dab735c9c2d63823d28edc9011e7a1ad ]

Remove the redundant enabling of the hdmi_sound node in the Pinebook Pro
board dts file, because the HDMI output is unused on this device. [1][2]

This change also eliminates the following kernel log warning, which is
caused by the unenabled dependent node of hdmi_sound that ultimately
results in the node's probe failure:

  platform hdmi-sound: deferred probe pending: asoc-simple-card: parse error

[1] https://files.pine64.org/doc/PinebookPro/pinebookpro_v2.1_mainboard_schematic.pdf
[2] https://files.pine64.org/doc/PinebookPro/pinebookpro_schematic_v21a_20220419.pdf

Cc: stable@vger.kernel.org
Fixes: 5a65505a69884 ("arm64: dts: rockchip: Add initial support for Pinebook Pro")
Signed-off-by: Jun Yan &lt;jerrysteve1101@gmail.com&gt;
Reviewed-by: Peter Robinson &lt;pbrobinson@gmail.com&gt;
Reviewed-by: Dragan Simic &lt;dsimic@manjaro.org&gt;
Link: https://patch.msgid.link/20260116151253.9223-1-jerrysteve1101@gmail.com
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>arm64: dts: apple: t8112-j473: Keep the HDMI port powered on</title>
<updated>2026-03-04T12:21:39+00:00</updated>
<author>
<name>Janne Grunau</name>
<email>j@jannau.net</email>
</author>
<published>2026-01-08T21:04:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=b19beca4ae66cd591e45d62e8b4edef6d952f8e6'/>
<id>urn:sha1:b19beca4ae66cd591e45d62e8b4edef6d952f8e6</id>
<content type='text'>
[ Upstream commit 3e4e729325131fe6f7473a0673f7d8cdde53f5a0 ]

Add the display controller and DPTX phy power-domains to the framebuffer
node to keep the framebuffer and display out working after device probing
finished.
The OS has more control about the display pipeline used for the HDMI
output on M2 based devices. The HDMI output is driven by an integrated
DisplayPort to HDMI converter (Parade PS190). The DPTX phy is now
controlled by the OS and no longer by firmware running on the display
co-processor. This allows using the second display controller on the
second USB type-c port or tunneling 2 DisplayPort connections over
USB4/Thunderbolt.
The m1n1 bootloader uses the second display controller to drive the HDMI
output. Adjust for this difference compared to the notebooks as well.

Fixes: 2d5ce3fbef32 ("arm64: dts: apple: t8112: Initial t8112 (M2) device trees")
Cc: stable@vger.kernel.org
Signed-off-by: Janne Grunau &lt;j@jannau.net&gt;
Link: https://patch.msgid.link/20260108-apple-dt-pmgr-fixes-v1-1-cfdce629c0a8@jannau.net
Signed-off-by: Sven Peter &lt;sven@kernel.org&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>arm64: dts: qcom: x1e80100: Add missing TCSR ref clock to the DP PHYs</title>
<updated>2026-03-04T12:21:38+00:00</updated>
<author>
<name>Abel Vesa</name>
<email>abel.vesa@linaro.org</email>
</author>
<published>2025-12-24T10:53:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=8c73302be4752e13e20c8cbdfe78a353f820fe2a'/>
<id>urn:sha1:8c73302be4752e13e20c8cbdfe78a353f820fe2a</id>
<content type='text'>
[ Upstream commit 0907cab01ff9746ecf08592edd9bd85d2636be58 ]

The DP PHYs on X1E80100 need the ref clock which is provided by the
TCSR CC.

The current X Elite devices supported upstream work fine without this
clock, because the boot firmware leaves this clock enabled. But we should
not rely on that. Also, even though this change breaks the ABI, it is
needed in order to make the driver disables this clock along with the
other ones, for a proper bring-down of the entire PHY.

So lets attach it to each of the DP PHYs in order to do that.

Cc: stable@vger.kernel.org # v6.9
Fixes: 1940c25eaa63 ("arm64: dts: qcom: x1e80100: Add display nodes")
Reviewed-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
Signed-off-by: Abel Vesa &lt;abel.vesa@linaro.org&gt;
Link: https://lore.kernel.org/r/20251224-phy-qcom-edp-add-missing-refclk-v5-3-3f45d349b5ac@oss.qualcomm.com
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>arm64: tegra: smaug: Add usb-role-switch support</title>
<updated>2026-03-04T12:20:59+00:00</updated>
<author>
<name>Diogo Ivo</name>
<email>diogo.ivo@tecnico.ulisboa.pt</email>
</author>
<published>2025-12-04T21:27:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=589b7b0fc87e52cd6295543b140ded2c3b37818b'/>
<id>urn:sha1:589b7b0fc87e52cd6295543b140ded2c3b37818b</id>
<content type='text'>
[ Upstream commit dfa93788dd8b2f9c59adf45ecf592082b1847b7b ]

The USB2 port on Smaug is configured for OTG operation but lacked the
required 'usb-role-switch' property, leading to a failed probe and a
non-functioning USB port. Add the property along with setting the default
role to host.

Signed-off-by: Diogo Ivo &lt;diogo.ivo@tecnico.ulisboa.pt&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
</feed>
