<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/arch/arm64/boot, branch master</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=master</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=master'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2026-04-23T08:02:27+00:00</updated>
<entry>
<title>Merge tag 'amlogic-fixes-v7.1-rc' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/late2</title>
<updated>2026-04-23T08:02:27+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2026-04-23T08:02:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=dd5dc1917473f398949b95f6b77c60d4d8eb1d97'/>
<id>urn:sha1:dd5dc1917473f398949b95f6b77c60d4d8eb1d97</id>
<content type='text'>
Amlogic DT Fixes for v7.1:
- Fix ethernet PHY interrupt number for P230 reference board
- Add missing cache information to cpu0 for Amlogic AXG
- Fix Khadas VIM4 board model name
- Fix GIC register ranges for Amlogic T7
- Fix Khadas VIM4 memory layout for 8GB RAM
- Drop CPU masks from GICv3 PPI interrupts for Amlogic S6

* tag 'amlogic-fixes-v7.1-rc' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
  arm64: dts: meson-gxl-p230: fix ethernet PHY interrupt number
  arm64: dts: amlogic: meson-axg: Add missing cache information to cpu0
  arm64: dts: amlogic: t7: khadas-vim4: fix board model name
  arm64: dts: amlogic: Fix GIC register ranges for Amlogic T7
  arm64: dts: amlogic: t7: khadas-vim4: fix memory layout for 8GB RAM
  arm64: dts: amlogic: s6: Drop CPU masks from GICv3 PPI interrupts

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>arm64: dts: meson-gxl-p230: fix ethernet PHY interrupt number</title>
<updated>2026-04-21T13:46:29+00:00</updated>
<author>
<name>Jun Yan</name>
<email>jerrysteve1101@gmail.com</email>
</author>
<published>2026-03-30T14:51:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=174a0ef3b33434f475c87e66f37980e39b73805a'/>
<id>urn:sha1:174a0ef3b33434f475c87e66f37980e39b73805a</id>
<content type='text'>
Correct the interrupt number assigned to the Realtek PHY in the p230

following the same logic as commit 3106507e1004 ("ARM64: dts: meson-gxm:
fix q200 interrupt number"),as reported in [PATCH 0/2] Ethernet PHY
interrupt improvements [1].

[1] https://lore.kernel.org/all/20171202214037.17017-1-martin.blumenstingl@googlemail.com/

Fixes: b94d22d94ad2 ("ARM64: dts: meson-gx: add external PHY interrupt on some platforms")
Signed-off-by: Jun Yan &lt;jerrysteve1101@gmail.com&gt;
Reviewed-by: Martin Blumenstingl &lt;martin.blumenstingl@googlemail.com&gt;
Link: https://patch.msgid.link/20260330145111.115318-1-jerrysteve1101@gmail.com
Signed-off-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
</content>
</entry>
<entry>
<title>arm64: dts: amlogic: meson-axg: Add missing cache information to cpu0</title>
<updated>2026-04-21T13:46:22+00:00</updated>
<author>
<name>Anand Moon</name>
<email>linux.amoon@gmail.com</email>
</author>
<published>2026-02-19T10:35:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=918273be0885362a9a00615b46e03f15f8b55667'/>
<id>urn:sha1:918273be0885362a9a00615b46e03f15f8b55667</id>
<content type='text'>
Add missing L1 data and instruction cache parameters to the CPU node 0
for the Cortex-A53 caches on the Meson AXG SoC.

Fixes: 3b6ad2a43367 ("arm64: dts: amlogic: Add cache information to the Amlogic AXG SoCS")
Signed-off-by: Anand Moon &lt;linux.amoon@gmail.com&gt;
Link: https://patch.msgid.link/20260219103548.18392-1-linux.amoon@gmail.com
Signed-off-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
</content>
</entry>
<entry>
<title>arm64: dts: amlogic: t7: khadas-vim4: fix board model name</title>
<updated>2026-04-21T13:46:22+00:00</updated>
<author>
<name>Nick Xie</name>
<email>nick@khadas.com</email>
</author>
<published>2026-03-06T03:07:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=28e4a49a28b339b3d14564dd763d109799782687'/>
<id>urn:sha1:28e4a49a28b339b3d14564dd763d109799782687</id>
<content type='text'>
Update the model property to "Khadas VIM4" to match the official
product branding and maintain consistency with other Khadas boards
(e.g., VIM1, VIM2, VIM3) in the kernel tree.

Signed-off-by: Nick Xie &lt;nick@khadas.com&gt;
Reviewed-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Link: https://patch.msgid.link/20260306030756.2421841-1-nick@khadas.com
Signed-off-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
</content>
</entry>
<entry>
<title>arm64: dts: amlogic: Fix GIC register ranges for Amlogic T7</title>
<updated>2026-04-21T13:46:22+00:00</updated>
<author>
<name>Ronald Claveau</name>
<email>linux-kernel-dev@aliel.fr</email>
</author>
<published>2026-03-05T22:11:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=232eb5dc61ef5a29aa92259b12ab4cb9b87deeb3'/>
<id>urn:sha1:232eb5dc61ef5a29aa92259b12ab4cb9b87deeb3</id>
<content type='text'>
This patch aims to fix the GIC register ranges for Amlogic T7 SoC family.

- Context
Kernel log shows a warning about GIC
[    0.000000] GIC: GICv2 detected, but range too small and irqchip.gicv2_force_probe not set

Using cat /proc/interrupts command shows GIC as GIC-0

Adding some peripherals sometimes causes hangs on interrupts.

- According to the GIC-400 ARM doc, the memory map is like:
0x1000-0x1FFF Distributor
0x2000-0x3FFF CPU interfaces
0x4000-0x5FFF Virtual interface control block
0x6000-0x7FFF Virtual CPU interfaces

- Identify GIC model from distributor register

Offset | Name | Type | Reset
0x008 | GICD_IIDR | RO | 0x0200143B

kvim4# md.l 0xFFF01008 1
fff01008: 0200143b

- Identify CPU interface from CPU interface register

Offset | Name | Type | Reset
0x00FC | GICC_IIDR | RO | 0x0202143B

kvim4# md.l 0xFFF020FC 1
fff020fc: 0202143b

- Virtual interface control register check

Offset | Name | Type | Reset
0x004 | GICH_VTR | RO | 0x90000003

kvim4# md.l 0xFFF04004 1
fff04004: 90000003

- Virtual CPU interfaces check

Offset | Name | Type | Reset
0x00FC | GICV_IIDR | RO | 0x0202143B

kvim4# md.l 0xFFF060FC 1
fff060fc: 0202143b

- After this patch there is no warning anymore.
GICv2 is correctly identified.

[    0.000000] GIC: Using split EOI/Deactivate mode

Using cat /proc/interrupts command shows GIC as GICv2

Signed-off-by: Ronald Claveau &lt;linux-kernel-dev@aliel.fr&gt;
Reviewed-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Link: https://patch.msgid.link/20260305-fix-amlt7-gic-dts-v1-1-5944415c74bf@aliel.fr
Signed-off-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
</content>
</entry>
<entry>
<title>arm64: dts: amlogic: t7: khadas-vim4: fix memory layout for 8GB RAM</title>
<updated>2026-04-21T13:46:22+00:00</updated>
<author>
<name>Nick Xie</name>
<email>nick@khadas.com</email>
</author>
<published>2026-03-19T02:34:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=124d5e138ab5629118ebc30a59139d5498e6ee4c'/>
<id>urn:sha1:124d5e138ab5629118ebc30a59139d5498e6ee4c</id>
<content type='text'>
The Khadas VIM4 features 8GB of LPDDR4X RAM. The previous memory node
mapped a single incorrect region. This caused the kernel to map MMIO
and secure firmware (ATF/TrustZone) memory holes as standard RAM,
leading to an Asynchronous SError Interrupt during early boot
(paging_init) when the kernel attempted to clear those pages.

Fix this by splitting the 8GB memory layout into three separate
regions to properly avoid the memory holes (e.g., 0xe0000000 -
0xffffffff):
- 3.5GB @ 0x000000000
- 3.5GB @ 0x100000000
- 1.0GB @ 0x200000000

Signed-off-by: Nick Xie &lt;nick@khadas.com&gt;
Suggested-by: Ronald Claveau &lt;linux-kernel-dev@aliel.fr&gt;
Link: https://patch.msgid.link/20260319023446.3422695-1-nick@khadas.com
Signed-off-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
</content>
</entry>
<entry>
<title>arm64: dts: amlogic: s6: Drop CPU masks from GICv3 PPI interrupts</title>
<updated>2026-04-21T13:46:22+00:00</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2026-03-04T17:10:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=5ecee47dc9fc5959c04826a227135a03bc0d0267'/>
<id>urn:sha1:5ecee47dc9fc5959c04826a227135a03bc0d0267</id>
<content type='text'>
Unlike older GIC variants, the GICv3 DT bindings do not support
specifying a CPU mask in PPI interrupt specifiers.  Drop the masks.
While at it, replace the magic number for IRQ_TYPE_LEVEL_HIGH by its
symbolic definition.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Reviewed-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Link: https://patch.msgid.link/f9c6eddebebcd2e128edd2dbc51706e23589f9e8.1772643434.git.geert+renesas@glider.be
Signed-off-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'apple-soc-fixes-7.0' of https://git.kernel.org/pub/scm/linux/kernel/git/sven/linux into soc/late2</title>
<updated>2026-04-20T15:26:46+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2026-04-20T15:26:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=d21877ac2766611d7a072a1dd7e1b66f5e26e3d3'/>
<id>urn:sha1:d21877ac2766611d7a072a1dd7e1b66f5e26e3d3</id>
<content type='text'>
Apple SoC fixes for 7.0

Two commits without any functional changes that arrived just before the
merge window opened:
- Update Sasha's email address in all dt-bindings, MAINTAINERS and add
  him to mailmap
- Fix a typo in spi1-nvram.dtsi

* tag 'apple-soc-fixes-7.0' of https://git.kernel.org/pub/scm/linux/kernel/git/sven/linux:
  arm64: dts: apple: Fix spelling error
  dt-bindings: Update Sasha Finkelstein's email address
  mailmap: Update Sasha Finkelstein's email address

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>Merge tag 'mvebu-dt64-7.1-1' of https://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into soc/late2</title>
<updated>2026-04-20T15:03:16+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2026-04-20T15:03:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=de65fe9160d27166045291b9cdf7bffdb7d1c815'/>
<id>urn:sha1:de65fe9160d27166045291b9cdf7bffdb7d1c815</id>
<content type='text'>
mvebu dt64 for 7.1 (part 1)

- Armada 37xx/3720 device tree fixes:
   - Reorder USB PHYs, standardize names, drop undocumented
     properties, fix schema alignment

- Add Marvell 7k COMe board bindings and uDPU ethernet aliases

- Cleanup: drop unused .dtsi files

* tag 'mvebu-dt64-7.1-1' of https://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
  arm64: dts: marvell: armada-37xx: swap PHYs' order in USB3 controller node
  arm64: dts: marvell: armada-37xx: use 'usb2-phy' in USB3 controller's phy-names
  arm64: dts: marvell: armada-37xx: drop 'marvell,usb-misc-reg' from USB host nodes
  arm64: dts: marvell: armada-37xx: drop redundant status property
  arm64: dts: marvell: armada-37xx: align 'phy-names' of EHCI node with DT schema
  dt-bindings: arm64: add Marvell 7k COMe boards
  arm64: dts: marvell: armada-3720: drop 'marvell,xenon-emmc' properties
  arm64: dts: marvell: uDPU: add ethernet aliases
  arm/arm64: dts: marvell: Drop unused .dtsi
  arm64: dts: a7k: use phy handle

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>Merge branch 'arm/fixes' into soc/late2</title>
<updated>2026-04-20T15:02:56+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2026-04-20T15:02:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=7b82df336809eff5a2fdea1452c37cc45b448ec5'/>
<id>urn:sha1:7b82df336809eff5a2fdea1452c37cc45b448ec5</id>
<content type='text'>
* arm/fixes:
  arm64: dts: imx8mm-tqma8mqml: Correct PAD settings for PMIC_nINT
  arm64: dts: imx8mn-tqma8mqnl: Correct PAD settings for PMIC_nINT
  arm64: dts: imx8mm-emtop-som: Correct PAD settings for PMIC_nINT
  reset: amlogic: t7: Fix null reset ops
  arm64: dts: imx8mp-data-modul-edm-sbc: Correct PAD settings for PMIC_nINT
  arm64: dts: imx8mp-dhcom-som: Correct PAD settings for PMIC_nINT
  arm64: dts: imx8mp-ultra-mach-sbc: Correct PAD settings for PMIC_nINT
  arm64: dts: imx8mp-sr-som: Correct PAD settings for PMIC_nINT
  arm64: dts: imx8mp-nitrogen-som: Correct PAD settings for PMIC_nINT
  arm64: dts: imx8mp-aristainetos3a-som-v1: Correct PAD settings for PMIC_nINT
  arm64: dts: imx8mp-edm-g: Correct PAD settings for PMIC_nINT
  arm64: dts: imx8mp-icore-mx8mp: Correct PAD settings for PMIC_nINT
  arm64: dts: imx8mp-navqp: Correct PAD settings for PMIC_nINT
  arm64: dts: imx8mp-debix-som-a: Correct PAD settings for PMIC_nINT
  arm64: dts: imx8mp-debix-model-a: Correct PAD settings for PMIC_nINT
  dt-bindings: arm64: add Marvell 7k COMe boards
</content>
</entry>
</feed>
