<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/arch/arm64/boot/dts/intel, branch linux-7.0.y</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=linux-7.0.y</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=linux-7.0.y'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2026-01-30T15:44:46+00:00</updated>
<entry>
<title>arm64: dts: socfpga: agilex: add emmc support</title>
<updated>2026-01-30T15:44:46+00:00</updated>
<author>
<name>Ng Tze Yee</name>
<email>tzeyee.ng@altera.com</email>
</author>
<published>2026-01-26T06:42:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=95cc767d6f54e48629b593edc2ccbd154ec65d95'/>
<id>urn:sha1:95cc767d6f54e48629b593edc2ccbd154ec65d95</id>
<content type='text'>
The Agilex devkit supports a separate eMMC daughter card. The
eMMC daughter card replaces the SDMMC slot that is on the default
daughter card and thus requires a separate board dts file.

Signed-off-by: Ng Tze Yee &lt;tzeyee.ng@altera.com&gt;
Signed-off-by: Dinh Nguyen &lt;dinguyen@kernel.org&gt;
</content>
</entry>
<entry>
<title>arm64: dts: intel: agilex5: Add simple-bus node on top of dma controller node</title>
<updated>2026-01-30T15:27:12+00:00</updated>
<author>
<name>Khairul Anuar Romli</name>
<email>khairul.anuar.romli@altera.com</email>
</author>
<published>2025-12-29T03:49:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=4e6e93dfd501a16650806e7a39aa7b5203867276'/>
<id>urn:sha1:4e6e93dfd501a16650806e7a39aa7b5203867276</id>
<content type='text'>
Move dma-controller node under simple-bus node to allow bus node specific
property able to be properly defined. This is require to fulfill Agilex5
bus limitation that is limited to 40-addressable-bit.

Update the compatible string for the DMA controller nodes in the Agilex5
device tree from the generic "snps,axi-dma-1.01a" to the platform-specific
"altr,agilex5-axi-dma". Add fallback capability to ensure driver is able
to initialize properly.

This change enables the use of platform-specific features and constraints
in the driver, such as setting a 40-bit DMA addressable mask through
dma-ranges, which is required for Agilex5. It also aligns with the updated
device tree bindings and driver support for this compatible string.

Signed-off-by: Khairul Anuar Romli &lt;khairul.anuar.romli@altera.com&gt;
Signed-off-by: Dinh Nguyen &lt;dinguyen@kernel.org&gt;
</content>
</entry>
<entry>
<title>arm64: dts: altera: Use lowercase hex</title>
<updated>2026-01-30T15:27:12+00:00</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@oss.qualcomm.com</email>
</author>
<published>2025-12-23T15:24:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=5acb925409e2f089e6e25212ae64d13dea6b464a'/>
<id>urn:sha1:5acb925409e2f089e6e25212ae64d13dea6b464a</id>
<content type='text'>
The DTS code coding style expects lowercase hex for values and unit
addresses.

Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@oss.qualcomm.com&gt;
Signed-off-by: Dinh Nguyen &lt;dinguyen@kernel.org&gt;
</content>
</entry>
<entry>
<title>arm64: dts: socfpga: agilex5: Add IOMMUS property for ethernet nodes</title>
<updated>2026-01-30T15:27:12+00:00</updated>
<author>
<name>Nazim Amirul</name>
<email>muhammad.nazim.amirul.nazle.asmade@altera.com</email>
</author>
<published>2025-12-04T02:29:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=67c1d7894766d3a503e6c48c729f17a9a9dea32c'/>
<id>urn:sha1:67c1d7894766d3a503e6c48c729f17a9a9dea32c</id>
<content type='text'>
To enable SMMU integration, populate the iommus property to the ethernet
device-tree node.

Signed-off-by: Nazim Amirul &lt;muhammad.nazim.amirul.nazle.asmade@altera.com&gt;
Signed-off-by: Dinh Nguyen &lt;dinguyen@kernel.org&gt;
</content>
</entry>
<entry>
<title>arm64: dts: socfpga: agilex5: add support for modular board</title>
<updated>2026-01-30T15:27:12+00:00</updated>
<author>
<name>Niravkumar L Rabara</name>
<email>niravkumarlaxmidas.rabara@altera.com</email>
</author>
<published>2025-12-02T10:16:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=ebb6a68a4857107f3574ef058f2b83f3288d0d08'/>
<id>urn:sha1:ebb6a68a4857107f3574ef058f2b83f3288d0d08</id>
<content type='text'>
The Agilex5 Modular board consists of a compute module (Agilex5 SoCFPGA)
attached to a carrier board that provides PCIe and additional system
interfaces.

Signed-off-by: Niravkumar L Rabara &lt;niravkumarlaxmidas.rabara@altera.com&gt;
Signed-off-by: Dinh Nguyen &lt;dinguyen@kernel.org&gt;
</content>
</entry>
<entry>
<title>arm64: dts: socfpga: agilex5: Add dma-coherent property</title>
<updated>2026-01-30T15:27:12+00:00</updated>
<author>
<name>Khairul Anuar Romli</name>
<email>khairul.anuar.romli@altera.com</email>
</author>
<published>2025-12-02T23:47:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=8c4caab05ff162e2dd9b66a72a21d9605fb143cf'/>
<id>urn:sha1:8c4caab05ff162e2dd9b66a72a21d9605fb143cf</id>
<content type='text'>
Add the `dma-coherent` property to these device nodes to inform the
kernel and DMA subsystem that the devices support hardware-managed
cache coherence.

Changes:
 - Add `dma-coherent` to `cdns,hp-nfc`
 - Add `dma-coherent` to both `snps,axi-dma-1.01a` instances
   (dmac0, dmac1)

This aligns the Agilex5 device tree with the coherent DMA-capable
devices accordingly.

Signed-off-by: Khairul Anuar Romli &lt;khairul.anuar.romli@altera.com&gt;
Signed-off-by: Dinh Nguyen &lt;dinguyen@kernel.org&gt;
</content>
</entry>
<entry>
<title>arm64: dts: socfpga: agilex5: update qspi partitions for 013b board</title>
<updated>2025-11-17T11:37:59+00:00</updated>
<author>
<name>Niravkumar L Rabara</name>
<email>niravkumarlaxmidas.rabara@altera.com</email>
</author>
<published>2025-11-14T15:40:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=38eff72f2d3a83475d70ac3a1280b5051d1e46b0'/>
<id>urn:sha1:38eff72f2d3a83475d70ac3a1280b5051d1e46b0</id>
<content type='text'>
Update qspi flash partitions to support Remote System Update (RSU).

Signed-off-by: Niravkumar L Rabara &lt;niravkumarlaxmidas.rabara@altera.com&gt;
Signed-off-by: Dinh Nguyen &lt;dinguyen@kernel.org&gt;
</content>
</entry>
<entry>
<title>arm64: dts: socfpga: add Agilex3 board</title>
<updated>2025-11-14T13:00:22+00:00</updated>
<author>
<name>Niravkumar L Rabara</name>
<email>niravkumarlaxmidas.rabara@altera.com</email>
</author>
<published>2025-11-14T00:59:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=44964e81d12809d3a909c9a81068753bb95ef954'/>
<id>urn:sha1:44964e81d12809d3a909c9a81068753bb95ef954</id>
<content type='text'>
Agilex3 SoCFPGA development kit is a small form factor board similar to
Agilex5 013b board. Agilex3 is derived from Agilex5 SoCFPGA, with the main
difference of CPU cores — Agilex3 has 2 cores compared to 4 in Agilex5.

Signed-off-by: Niravkumar L Rabara &lt;niravkumarlaxmidas.rabara@altera.com&gt;
Signed-off-by: Dinh Nguyen &lt;dinguyen@kernel.org&gt;
</content>
</entry>
<entry>
<title>arm64: dts: intel: agilex5: Add Altera compatible for I3C controllers</title>
<updated>2025-11-12T18:57:02+00:00</updated>
<author>
<name>Adrian Ng Ho Yin</name>
<email>adrianhoyin.ng@altera.com</email>
</author>
<published>2025-11-04T07:29:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=5e7235d122f059f7f3b335d50227d74047d0c7da'/>
<id>urn:sha1:5e7235d122f059f7f3b335d50227d74047d0c7da</id>
<content type='text'>
Add the "altr,agilex5-dw-i3c-master" compatible string to the
I3C controller nodes on the Agilex5 SoCFPGA platform.

Signed-off-by: Adrian Ng Ho Yin &lt;adrianhoyin.ng@altera.com&gt;
Signed-off-by: Dinh Nguyen &lt;dinguyen@kernel.org&gt;
</content>
</entry>
<entry>
<title>arm64: dts: socfpga: Add Agilex5 SVC node with memory region</title>
<updated>2025-11-11T03:00:37+00:00</updated>
<author>
<name>Khairul Anuar Romli</name>
<email>khairul.anuar.romli@altera.com</email>
</author>
<published>2025-11-06T23:35:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=1aa4ee5338cbca1c5118d5a09b523d3818dddc2f'/>
<id>urn:sha1:1aa4ee5338cbca1c5118d5a09b523d3818dddc2f</id>
<content type='text'>
Introduce the Stratix10 SoC Service Layer (SVC) node for Agilex5 SoCs. This
node includes the compatible string "intel,agilex5-svc" and references a
reserved memory region used for communication with the Secure Device
Manager (SDM).

Agilex5 introduces changes in how reserved memory is mapped and accessed
compared to previous SoC generations. This commit updates the device tree
structure to support Agilex5-specific handling of the SVC interface.

Signed-off-by: Khairul Anuar Romli &lt;khairul.anuar.romli@altera.com&gt;
Signed-off-by: Dinh Nguyen &lt;dinguyen@kernel.org&gt;
</content>
</entry>
</feed>
