kernel/linux.git/arch/arm/include/asm, branch v7.2-rc1

Merge tag 'mm-nonmm-stable-2026-06-21-10-22' of git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm

2026-06-21T20:20:19+00:00

Pull non-MM updates from Andrew Morton: - "taskstats: fix TGID dead-thread stat retention" (Yiyang Chen) Fix a taskstats TGID aggregation bug where fields added in the TGID query path were not preserved after thread exit, and adds a kselftest covering the regression. - "lib/tests: string_helpers: Slight improvements" (Andy Shevchenko) Improve lib/tests/string_helpers_kunit.c a little - "lib/base64: decode fixes" (Josh Law) Address minor issues in lib/base64.c - "selftests/filelock: Make output more kselftestish" (Mark Brown) Make the output from the ofdlocks test a bit easier for tooling to work with. Also ignore the generated file - "uaccess: unify inline vs outline copy_{from,to}_user() selection" (Yury Norov) Simplify the usercopy code by removing the selectability of inlining copy_{from,to}_user(). - "ocfs2: validate inline xattr header consumers" (ZhengYuan Huang) Fix a number of possible issues in the ocfs2 xattr code - "lib and lib/cmdline enhancements" (Dmitry Antipov) Provide additional robustness checking in the cmdline handling code and its in-kernel testing and selftests - "cleanup the RAID6 P/Q library" (Christoph Hellwig) Clean up the RAID6 P/Q library to match the recent updates to the RAID 5 XOR library and other CRC/crypto libraries - "ocfs2: harden inode validators against forged metadata" (Michael Bommarito) Add three structural checks to OCFS2 dinode validation so malformed on-disk fields are rejected before ocfs2_populate_inode() copies them into the in-core inode - "lib/raid: replace __get_free_pages() call with kmalloc()" (Mike Rapoport) Clean up the lib/raid code by using kmalloc() in more places * tag 'mm-nonmm-stable-2026-06-21-10-22' of git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm: (108 commits) ocfs2: fix circular locking dependency in ocfs2_dio_end_io_write ocfs2: fix NULL h_transaction deref in ocfs2_assure_trans_credits lib: interval_tree_test: validate benchmark parameters ocfs2: avoid moving extents to occupied clusters treewide: fix transposed "sign" typos and update spelling.txt ocfs2: fix UBSAN array-index-out-of-bounds in ocfs2_sum_rightmost_rec fat: reject BPB volumes whose data area starts beyond total sectors selftests/uevent: increase __UEVENT_BUFFER_SIZE to avoid ENOBUFS on busy systems lib/test_firmware: allocate the configured into_buf size fs: efs: remove unneeded debug prints checkpatch: cuppress warnings when Reported-by: is followed by Link: MAINTAINERS: add Alexander as a kcov reviewer mailmap: update Alexander Sverdlin's Email addresses fs: fat: inode: replace sprintf() with scnprintf() ocfs2: fix out-of-bounds write in ocfs2_remove_refcount_extent ocfs2: fix race between ocfs2_control_install_private() and ocfs2_control_release() ocfs2/dlm: require a ref for locking_state debugfs open ocfs2: reject FITRIM ranges shorter than a cluster ocfs2: validate fast symlink target during inode read ocfs2: add journal NULL check in ocfs2_checkpoint_inode() ...

Merge tag 'soc-arm-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

2026-06-17T18:28:10+00:00

Pull arm SoC code updates from Arnd Bergmann: "The largest addition here is the revived support for the ZTE ZX SoC platform, though this mostly documentation. The other changes are code cleanups that deal with continued conversion of the GPIO library away from GPIO numbers to descriptors and a few minor bugfixes" * tag 'soc-arm-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: MAINTAINERS: Add Axiado reviewer and Maintainers ARM: remove the last few uses of do_bad_IRQ() ARM: imx31: Fix IIM mapping leak in revision check ARM: imx3: Fix CCM node reference leak ARM: orion5x: update board check in mss2_pci_init() to use the DT arm: mvebu_v5_defconfig: remove stale MACH_LINKSTATION_LSCHL reference ARM: mvebu: simplify of_node_put calls ARM: mvebu: drop unnecessary NULL check arm: boot: ep93xx: don't rely on machine_is_*() for removed board files ARM: zte: clean up zx297520v3 doc. warnings arm64: Kconfig: drop unneeded dependency on OF_GPIO for ARCH_MVEBU firmware: imx: sm-misc: Make scmi_imx_misc_ctrl_nb variable static ARM: zte: Add zx297520v3 platform support ARM: pxa: pxa27x: attach software node to its target GPIO controller ARM: pxa: pxa25x: attach software node to its target GPIO controller ARM: pxa: spitz: attach software nodes to their target GPIO controllers ARM: pxa: statify platform device definitions in spitz board file ARM: omap2: simplify allocation for omap_device ARM: select legacy gpiolib interfaces where used ARM: s3c: use gpio lookup table for LEDs

Merge tag 'modules-7.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/modules/linux

2026-06-17T10:35:58+00:00

Pull modules updates from Sami Tolvanen: - Add a missing return value check for module_extend_max_pages() to prevent a kernel oops on memory allocation failure. - Force sh_addr to 0 for architecture-specific module sections on arm, arm64, m68k, and riscv. This prevents non-zero section addresses when linking modules with ld.bfd -r, which may cause tools to misbehave and result in worse compressibility. - Replace pr_warn! with pr_warn_once! for set_param null pointer warnings in Rust abstractions, now that the _once variant is available. * tag 'modules-7.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/modules/linux: rust: module_param: add missing newline to pr_warn_once module: decompress: check return value of module_extend_max_pages() rust: module_param: use `pr_warn_once!` for null pointer warning module, riscv: force sh_addr=0 for arch-specific sections module, m68k: force sh_addr=0 for arch-specific sections module, arm64: force sh_addr=0 for arch-specific sections module, arm: force sh_addr=0 for arch-specific sections

Merge tag 'crc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/ebiggers/linux

2026-06-16T03:46:37+00:00

Pull CRC updates from Eric Biggers: "Accelerate CRC64-NVME for 32-bit ARM by refactoring the arm64 NEON intrinsics implementation to be shared by 32-bit and 64-bit. Also apply a similar cleanup to the 32-bit ARM NEON implementation of xor_gen(), where it now reuses code from the 64-bit implementation" * tag 'crc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/ebiggers/linux: crypto: aegis128 - Use neon-intrinsics.h on ARM too lib/crc: arm: Enable arm64's NEON intrinsics implementation of crc64 lib/crc: Turn NEON intrinsics crc64 implementation into common code xor/arm64: Use shared NEON intrinsics implementation from 32-bit ARM xor/arm: Replace vectorized implementation with arm64's intrinsics ARM: Add a neon-intrinsics.h header like on arm64

Merge tag 'irq-drivers-2026-06-13' of gitolite.kernel.org:pub/scm/linux/kernel/git/tip/tip

2026-06-15T07:55:32+00:00

Pull interrupt chip driver updates from Thomas Gleixner: - Replace the support for the AST2700-A0 early silicon with a proper driver for the final A2 production silicon - Rename and rework the StarFive JH8100 interrupt controller for the new JHB100 SoC as JH8100 was discontinued before production. - Add support for Amlogic A9 SoCs to the meson-gpio interrupt controller - Expand the Econet interrupt controller driver to support MIPS 34Kc Vectored External Interrupt Controller mode. - Prevent a NULL pointer dereference in the GICv4 code as the vLPI code blindly assumes that the ITS was populated. Add the missing sanity check. - Add support for software triggered and for error interrupts to the Renesas RZ/T2H driver. - Add interrupt redirection support for the loongarch architecture. - Add multicore support to the Realtek RTL interrupt driver - The usual updates, enhancements and fixes all over the place * tag 'irq-drivers-2026-06-13' of gitolite.kernel.org:pub/scm/linux/kernel/git/tip/tip: (32 commits) irqchip/irq-realtek-rtl: Add multicore support irqchip/irq-realtek-rtl: Add/simplify register helpers irqchip/loongarch-ir: Add IR (interrupt redirection) irqchip support irqchip/loongarch-avec: Return IRQ_SET_MASK_OK_DONE when keep affinity irqchip/loongarch-avec: Prepare for interrupt redirection support Docs/LoongArch: Add advanced extended IRQ model irqchip/qcom-pdc: Use FIELD_GET() to extract bank index and bit position irqchip/qcom-pdc: Add PDC_VERSION() macro to describe version register fields irqchip/qcom-pdc: Tighten ioremap clamp to single DRV region size irqchip/qcom-pdc: Split __pdc_enable_intr() into per-version helpers irqchip/exynos-combiner: Remove useless spinlock irqchip/renesas-rzt2h: Add error interrupts support irqchip/renesas-rzt2h: Add software-triggered interrupts support irqchip/gic-v4: Don't advertise VLPIs if no ITS is probed irqchip/gic-v3-its: Use FIELD_MODIFY() irqchip/econet-en751221: Support MIPS 34Kc VEIC mode dt-bindings: interrupt-controller: econet: Add CPU interrupt mapping irqchip/meson-gpio: Add support for Amlogic A9 SoCs dt-bindings: interrupt-controller: Add support for Amlogic A9 SoCs irqchip/meson-gpio: Use the correct register in meson_s4_gpio_irq_set_type() ...

Merge tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rmk/linux

2026-06-14T14:37:39+00:00

Pull ARM fixes from Russell King: - Avoid KASAN instrumentation of half-word IO - Use a byte load for KASAN shadow stack - Fix kexec and hibernation with PAN * tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rmk/linux: ARM: 9476/1: mm: fix kexec and hibernation with CONFIG_CPU_TTBR0_PAN ARM: 9475/1: entry: use byte load for KASAN VMAP stack shadow ARM: 9474/1: io: avoid KASAN instrumentation of raw halfword I/O

ARM: 9474/1: io: avoid KASAN instrumentation of raw halfword I/O

2026-06-11T13:52:00+00:00

For CPUs before ARMv6, __raw_readw() and __raw_writew() are implemented as C volatile halfword accesses so the compiler can generate an access sequence that is safe for those machines. With KASAN enabled, those C accesses are instrumented as normal memory accesses. That is not valid for MMIO. On ARM926/VersatilePB with KASAN enabled, PL011 probing traps in __asan_store2() while registering the UART, because the instrumented writew() tries to check KASAN shadow for an MMIO address. Keep the existing volatile halfword access, but move the ARMv5 definitions into __no_kasan_or_inline functions so raw MMIO halfword accesses are not instrumented by KASAN. The ARMv6-and-newer inline assembly path is unchanged. Fixes: 421015713b30 ("ARM: 9017/2: Enable KASan for ARM") Cc: stable@vger.kernel.org # v5.11+ Signed-off-by: Karl Mehltretter Reviewed-by: Linus Walleij Signed-off-by: Russell King

ARM: remove the last few uses of do_bad_IRQ()

2026-06-10T08:38:21+00:00

The do_bad_IRQ() macro simply calls handle_bad_irq() with a lock around it. It also carries a comment stating that uses of it should be replaced. According to commit aec0095653cd ("irqchip: gic: Call handle_bad_irq() directly"), which replaced another use of do_bad_IRQ(), locking the IRQ descriptor is not necessary for error reporting. Therefore, replace all uses of do_bad_IRQ() with calls to handle_bad_irq() and remove do_bad_IRQ(). Signed-off-by: Ethan Nelson-Moore Reviewed-by: Linus Walleij Link: https://lore.kernel.org/r/20260610045626.248643-1-enelsonmoore@gmail.com Signed-off-by: Arnd Bergmann

uaccess: unify inline vs outline copy_{from,to}_user() selection

2026-05-29T04:24:44+00:00

The kernel allows arches to select between inline and outline implementations of the copy_{from,to}_user() by defining individual INLINE_COPY_FROM_USER and INLINE_COPY_TO_USER, correspondingly. However, all arches enable or disable them always together. Without the real use-case for one helper being inlined while the other outlined, having independent controls is excessive and error prone. Switch the codebase to the single unified INLINE_COPY_USER control. Link: https://lore.kernel.org/20260425020857.356850-3-ynorov@nvidia.com Signed-off-by: Yury Norov Tested-by: Alice Ryhl Cc: Arnd Bergmann Cc: Christophe Leroy (CS GROUP) Cc: Mathieu Desnoyers Cc: Peter Zijlstra Cc: Randy Dunlap Cc: Viktor Malik Signed-off-by: Andrew Morton

ARM: Add a neon-intrinsics.h header like on arm64

2026-05-28T20:14:17+00:00

Add a header asm/neon-intrinsics.h similar to the one that arm64 has. This makes it possible for NEON intrinsics code to be shared seamlessly between ARM and arm64. Signed-off-by: Ard Biesheuvel Link: https://patch.msgid.link/20260422171655.3437334-11-ardb+git@google.com Signed-off-by: Eric Biggers