<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/arch/arm/include/asm/kvm_emulate.h, branch linux-4.16.y</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=linux-4.16.y</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=linux-4.16.y'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2018-01-23T15:48:32+00:00</updated>
<entry>
<title>KVM: arm/arm64: Fix trailing semicolon</title>
<updated>2018-01-23T15:48:32+00:00</updated>
<author>
<name>Luis de Bethencourt</name>
<email>luisbg@kernel.org</email>
</author>
<published>2018-01-23T15:11:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=b276f1b3b1eb52697f6645bb98f7d32ffb89df69'/>
<id>urn:sha1:b276f1b3b1eb52697f6645bb98f7d32ffb89df69</id>
<content type='text'>
The trailing semicolon is an empty statement that does no operation.
Removing it since it doesn't do anything.

Signed-off-by: Luis de Bethencourt &lt;luisbg@kernel.org&gt;
Signed-off-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm/arm64: fix the incompatible matching for external abort</title>
<updated>2017-11-06T15:23:20+00:00</updated>
<author>
<name>Dongjiu Geng</name>
<email>gengdongjiu@huawei.com</email>
</author>
<published>2017-10-30T06:05:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=a2b83133339067c1b27f902e32506ab2871e2320'/>
<id>urn:sha1:a2b83133339067c1b27f902e32506ab2871e2320</id>
<content type='text'>
kvm_vcpu_dabt_isextabt() tries to match a full fault syndrome, but
calls kvm_vcpu_trap_get_fault_type() that only returns the fault class,
thus reducing the scope of the check. This doesn't cause any observable
bug yet as we end-up matching a closely related syndrome for which we
return the same value.

Using kvm_vcpu_trap_get_fault() instead fixes it for good.

Signed-off-by: Dongjiu Geng &lt;gengdongjiu@huawei.com&gt;
Acked-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm/arm64: Unify 32bit fault injection</title>
<updated>2017-11-06T15:23:20+00:00</updated>
<author>
<name>Marc Zyngier</name>
<email>marc.zyngier@arm.com</email>
</author>
<published>2017-10-29T02:18:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=74a64a981662ab34289b3c90f6f964aa38ec1d9f'/>
<id>urn:sha1:74a64a981662ab34289b3c90f6f964aa38ec1d9f</id>
<content type='text'>
Both arm and arm64 implementations are capable of injecting
faults, and yet have completely divergent implementations,
leading to different bugs and reduced maintainability.

Let's elect the arm64 version as the canonical one
and move it into aarch32.c, which is common to both
architectures.

Reviewed-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm/arm64: Fix guest external abort matching</title>
<updated>2017-09-05T15:33:37+00:00</updated>
<author>
<name>James Morse</name>
<email>james.morse@arm.com</email>
</author>
<published>2017-07-18T12:37:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=bb428921b777a5e36753b5d6aa0ba8d46705cc0d'/>
<id>urn:sha1:bb428921b777a5e36753b5d6aa0ba8d46705cc0d</id>
<content type='text'>
The ARM-ARM has two bits in the ESR/HSR relevant to external aborts.
A range of {I,D}FSC values (of which bit 5 is always set) and bit 9 'EA'
which provides:
&gt; an IMPLEMENTATION DEFINED classification of External Aborts.

This bit is in addition to the {I,D}FSC range, and has an implementation
defined meaning. KVM should always ignore this bit when handling external
aborts from a guest.

Remove the ESR_ELx_EA definition and rewrite its helper
kvm_vcpu_dabt_isextabt() to check the {I,D}FSC range. This merges
kvm_vcpu_dabt_isextabt() and the recently added is_abort_sea() helper.

CC: Tyler Baicar &lt;tbaicar@codeaurora.org&gt;
Reported-by: gengdongjiu &lt;gengdj.1984@gmail.com&gt;
Signed-off-by: James Morse &lt;james.morse@arm.com&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Christoffer Dall &lt;cdall@linaro.org&gt;
</content>
</entry>
<entry>
<title>arm: KVM: Add Virtual Abort injection helper</title>
<updated>2016-09-08T10:53:00+00:00</updated>
<author>
<name>Marc Zyngier</name>
<email>marc.zyngier@arm.com</email>
</author>
<published>2016-09-06T13:02:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=bfb78b5c98d0e6b6dbd9af9cd71e853670a34044'/>
<id>urn:sha1:bfb78b5c98d0e6b6dbd9af9cd71e853670a34044</id>
<content type='text'>
Now that we're able to context switch the HCR.VA bit, let's
introduce a helper that injects an Abort into a vcpu.

Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
</content>
</entry>
<entry>
<title>arm: KVM: Use common AArch32 conditional execution code</title>
<updated>2016-09-08T10:53:00+00:00</updated>
<author>
<name>Marc Zyngier</name>
<email>marc.zyngier@arm.com</email>
</author>
<published>2016-09-06T08:28:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=3aedd5c49e63c0d31a53b00ab906d48f53abb68b'/>
<id>urn:sha1:3aedd5c49e63c0d31a53b00ab906d48f53abb68b</id>
<content type='text'>
Add the bit of glue and const-ification that is required to use
the code inherited from the arm64 port, and move over to it.

Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
</content>
</entry>
<entry>
<title>arm/arm64: KVM: Handle out-of-RAM cache maintenance as a NOP</title>
<updated>2016-02-29T18:34:15+00:00</updated>
<author>
<name>Marc Zyngier</name>
<email>marc.zyngier@arm.com</email>
</author>
<published>2016-01-29T15:01:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=57c841f131ef295b583365d2fddd6b0d16e82c10'/>
<id>urn:sha1:57c841f131ef295b583365d2fddd6b0d16e82c10</id>
<content type='text'>
So far, our handling of cache maintenance by VA has been pretty
simple: Either the access is in the guest RAM and generates a S2
fault, which results in the page being mapped RW, or we go down
the io_mem_abort() path, and nuke the guest.

The first one is fine, but the second one is extremely weird.
Treating the CM as an I/O is wrong, and nothing in the ARM ARM
indicates that we should generate a fault for something that
cannot end-up in the cache anyway (even if the guest maps it,
it will keep on faulting at stage-2 for emulation).

So let's just skip this instruction, and let the guest get away
with it.

Reviewed-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>ARM: KVM: Remove unused hyp_pc field</title>
<updated>2016-02-29T18:34:15+00:00</updated>
<author>
<name>Marc Zyngier</name>
<email>marc.zyngier@arm.com</email>
</author>
<published>2016-01-05T18:57:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=311b5b363cd28aa778de083178f147f32622e331'/>
<id>urn:sha1:311b5b363cd28aa778de083178f147f32622e331</id>
<content type='text'>
This field was never populated, and the panic code already
does something similar. Delete the related code.

Acked-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>ARM: KVM: Move GP registers into the CPU context structure</title>
<updated>2016-02-29T18:34:12+00:00</updated>
<author>
<name>Marc Zyngier</name>
<email>marc.zyngier@arm.com</email>
</author>
<published>2016-01-03T11:26:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=c2a8dab507ca6f8990c12372052efc830f51dd3f'/>
<id>urn:sha1:c2a8dab507ca6f8990c12372052efc830f51dd3f</id>
<content type='text'>
Continuing our rework of the CPU context, we now move the GP
registers into the CPU context structure.

Reviewed-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>ARM: KVM: Move CP15 array into the CPU context structure</title>
<updated>2016-02-29T18:34:12+00:00</updated>
<author>
<name>Marc Zyngier</name>
<email>marc.zyngier@arm.com</email>
</author>
<published>2016-01-03T11:26:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=fb32a52a1d4487f3ac5b7ccb659d0beb11ec504f'/>
<id>urn:sha1:fb32a52a1d4487f3ac5b7ccb659d0beb11ec504f</id>
<content type='text'>
Continuing our rework of the CPU context, we now move the CP15
array into the CPU context structure. As this causes quite a bit
of churn, we introduce the vcpu_cp15() macro that abstract the
location of the actual array. This will probably help next time
we have to revisit that code.

Reviewed-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
</feed>
