<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/arch/arm/boot/dts/microchip, branch v7.0.10</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v7.0.10</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v7.0.10'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2026-03-23T10:54:24+00:00</updated>
<entry>
<title>ARM: dts: microchip: sam9x7: fix gpio-lines count for pioB</title>
<updated>2026-03-23T10:54:24+00:00</updated>
<author>
<name>Mihai Sain</name>
<email>mihai.sain@microchip.com</email>
</author>
<published>2026-02-09T09:07:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=907150bbe566e23714a25d7bcb910f236c3c44c0'/>
<id>urn:sha1:907150bbe566e23714a25d7bcb910f236c3c44c0</id>
<content type='text'>
The pioB controller on the SAM9X7 SoC actually supports 27 GPIO lines.
The previous value of 26 was incorrect, leading to the last pin being
unavailable for use by the GPIO subsystem.
Update the #gpio-lines property to reflect
the correct hardware specification.

Fixes: 41af45af8bc3 ("ARM: dts: at91: sam9x7: add device tree for SoC")
Signed-off-by: Mihai Sain &lt;mihai.sain@microchip.com&gt;
Link: https://lore.kernel.org/r/20260209090735.2016-1-mihai.sain@microchip.com
Signed-off-by: Claudiu Beznea &lt;claudiu.beznea@tuxon.dev&gt;
</content>
</entry>
<entry>
<title>Merge tag 'soc-dt-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc</title>
<updated>2026-02-11T05:11:08+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2026-02-11T05:11:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=6589b3d76db2d6adbf8f2084c303fb24252a0dc6'/>
<id>urn:sha1:6589b3d76db2d6adbf8f2084c303fb24252a0dc6</id>
<content type='text'>
Pull SoC devicetree updates from Arnd Bergmann:
 "There are a handful of new SoCs this time, all of these are more or
  less related to chips in a wider family:

   - SpacemiT Key Stone K3 is an 8-core risc-v chip, and the first
     widely available RVA23 implementation. Note that this is entirely
     unrelated with the similarly named Texas Instruments K3 chip family
     that follwed the TI Keystone2 SoC.

   - The Realtek Kent family of SoCs contains three chip models
     rtd1501s, rtd1861b and rtd1920s, and is related to their earlier
     Set-top-box and NAS products such as rtd1619, but is built on newer
     Arm Cortex-A78 cores.

   - The Qualcomm Milos family includes the Snapdragon 7s Gen 3 (SM7635)
     mobile phone SoC built around Armv9 Kryo cores of the Arm
     Cortex-A720 generation. This one is used in the Fairphone Gen 6

   - Qualcomm Kaanapali is a new SoC based around eight high performance
     Oryon CPU cores

   - NXP i.MX8QP and i.MX952 are both feature reduced versions of chips
     we already support, i.e. the i.MX8QM and i.MX952, with fewer CPU
     cores and I/O interfaces.

  As part of a cleanup, a number of SoC specific devicetree files got
  removed because they did not have a single board using the .dtsi files
  and they were never compile tested as a result: Samsung s3c6400, ST
  spear320s, ST stm32mp21xc/stm32mp23xc/stm32mp25xc, Renesas
  r8a779m0/r8a779m2/r8a779m4/r8a779m6/r8a779m7/r8a779m8/r8a779mb/
  r9a07g044c1/r9a07g044l1/r9a07g054l1/r9a09g047e37, and TI
  am3703/am3715. All of these could be restored easily if a new board
  gets merged.

  Broadcom/Cavium/Marvell ThunderX2 gets removed along with its only
  machine, as all remaining users are assumed to be using ACPI based
  firmware.

  A relatively small number of 43 boards get added this time, and almost
  all of them for arm64. Aside from the reference boards for the newly
  added SoCs, this includes:

   - Three server boards use 32-bit ASpeed BMCs

   - One more reference board for 32-bit Microchip LAN9668

   - 64-bit Arm single-board computers based on Amlogic s905y4, CIX
     sky1, NXP ls1028a/imx8mn/imx8mp/imx91/imx93/imx95, Qualcomm
     qcs6490/qrb2210 and Rockchip rk3568/rk3588s

   - Carrier board for SOMs using Intel agilex5, Marvell Armada 7020,
     NXP iMX8QP, Mediatek mt8370/mt8390 and rockchip rk3588

   - Two mobile phones using Snapdragon 845

   - A gaming device and a NAS box, both based on Rockchips rk356x

  On top of the newly added boards and SoCs, there is a lot of
  background activity going into cleanups, in particular towards getting
  a warning-free dtc build, and the usual work on adding support for
  more hardware on the previously added machines"

* tag 'soc-dt-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (757 commits)
  dt-bindings: intel: Add Agilex eMMC support
  arm64: dts: socfpga: agilex: add emmc support
  arm64: dts: intel: agilex5: Add simple-bus node on top of dma controller node
  ARM: dts: socfpga: fix dtbs_check warning for fpga-region
  ARM: dts: socfpga: add #address-cells and #size-cells for sram node
  dt-bindings: altera: document syscon as fallback for sys-mgr
  arm64: dts: altera: Use lowercase hex
  dt-bindings: arm: altera: combine Intel's SoCFPGA into altera.yaml
  arm64: dts: socfpga: agilex5: Add IOMMUS property for ethernet nodes
  arm64: dts: socfpga: agilex5: add support for modular board
  dt-bindings: intel: Add Agilex5 SoCFPGA modular board
  arm64: dts: socfpga: agilex5: Add dma-coherent property
  arm64: dts: realtek: Add Kent SoC and EVB device trees
  dt-bindings: arm: realtek: Add Kent Soc family compatibles
  ARM: dts: samsung: Drop s3c6400.dtsi
  ARM: dts: nuvoton: Minor whitespace cleanup
  MAINTAINERS: Add Falcon DB
  arm64: dts: a7k: add COM Express boards
  ARM: dts: microchip: Drop usb_a9g20-dab-mmx.dtsi
  arm64: dts: rockchip: Fix rk3588 PCIe range mappings
  ...
</content>
</entry>
<entry>
<title>ARM: dts: microchip: Drop usb_a9g20-dab-mmx.dtsi</title>
<updated>2026-01-23T06:58:25+00:00</updated>
<author>
<name>Rob Herring (Arm)</name>
<email>robh@kernel.org</email>
</author>
<published>2026-01-22T20:23:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=e9ed88a4ce42bf42cd8b95a5b05298cf225b8b52'/>
<id>urn:sha1:e9ed88a4ce42bf42cd8b95a5b05298cf225b8b52</id>
<content type='text'>
This .dtsi file is not included anywhere in the tree and can't be
tested.

Acked-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
Signed-off-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
Link: https://lore.kernel.org/r/20260122202345.3387936-2-robh@kernel.org
Signed-off-by: Claudiu Beznea &lt;claudiu.beznea@tuxon.dev&gt;
</content>
</entry>
<entry>
<title>ARM: dts: Add support for pcb8385</title>
<updated>2026-01-09T06:55:55+00:00</updated>
<author>
<name>Horatiu Vultur</name>
<email>horatiu.vultur@microchip.com</email>
</author>
<published>2025-12-08T08:35:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=a8e30c9d856ddebad75abaec55c019a7a85b16da'/>
<id>urn:sha1:a8e30c9d856ddebad75abaec55c019a7a85b16da</id>
<content type='text'>
Add basic support for pcb8385 [1]. It is a modular board which allows
to add different daughter cards on which there are different PHYs.
This adds support for UART, LEDs and I2C.

[1] https://www.microchip.com/en-us/development-tool/ev83e85a

Signed-off-by: Horatiu Vultur &lt;horatiu.vultur@microchip.com&gt;
Link: https://lore.kernel.org/r/20251208083545.3642168-3-horatiu.vultur@microchip.com
Signed-off-by: Claudiu Beznea &lt;claudiu.beznea@tuxon.dev&gt;
</content>
</entry>
<entry>
<title>ARM: dts: microchip: sama7d65: add missing flexcom nodes</title>
<updated>2026-01-08T07:32:49+00:00</updated>
<author>
<name>Nicolas Ferre</name>
<email>nicolas.ferre@microchip.com</email>
</author>
<published>2026-01-02T17:01:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=d08fc1f551b51816c8d9c4c4a1b8d1cc1e6c0806'/>
<id>urn:sha1:d08fc1f551b51816c8d9c4c4a1b8d1cc1e6c0806</id>
<content type='text'>
Add nodes for usart, spi and i2c when missing to the
flexcom nodes.

Signed-off-by: Nicolas Ferre &lt;nicolas.ferre@microchip.com&gt;
Link: https://lore.kernel.org/r/20260102170135.70717-6-nicolas.ferre@microchip.com
Signed-off-by: Claudiu Beznea &lt;claudiu.beznea@tuxon.dev&gt;
</content>
</entry>
<entry>
<title>ARM: dts: microchip: sama7d65: add fifo-size to usart</title>
<updated>2026-01-08T07:32:49+00:00</updated>
<author>
<name>Nicolas Ferre</name>
<email>nicolas.ferre@microchip.com</email>
</author>
<published>2026-01-02T17:01:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=a395da9920b246d8d84dec09c7d6a7b52580ab27'/>
<id>urn:sha1:a395da9920b246d8d84dec09c7d6a7b52580ab27</id>
<content type='text'>
When missing, add the atmel,fifo-size = &lt;32&gt; property for usart nodes in
flexcom.

Signed-off-by: Nicolas Ferre &lt;nicolas.ferre@microchip.com&gt;
Link: https://lore.kernel.org/r/20260102170135.70717-5-nicolas.ferre@microchip.com
Signed-off-by: Claudiu Beznea &lt;claudiu.beznea@tuxon.dev&gt;
</content>
</entry>
<entry>
<title>ARM: dts: microchip: sama7d65: add dma properties to usart6</title>
<updated>2026-01-08T07:32:49+00:00</updated>
<author>
<name>Nicolas Ferre</name>
<email>nicolas.ferre@microchip.com</email>
</author>
<published>2026-01-02T17:01:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=c76e026616b65e21e115351b1623cae732008c0d'/>
<id>urn:sha1:c76e026616b65e21e115351b1623cae732008c0d</id>
<content type='text'>
Add the dma property and associated dma activation for usart6 as part of
flx6 node.
Is useful for usual default console on this product.

Signed-off-by: Nicolas Ferre &lt;nicolas.ferre@microchip.com&gt;
Link: https://lore.kernel.org/r/20260102170135.70717-4-nicolas.ferre@microchip.com
Signed-off-by: Claudiu Beznea &lt;claudiu.beznea@tuxon.dev&gt;
</content>
</entry>
<entry>
<title>ARM: dts: microchip: sama7d65: fix size-cells property for i2c3</title>
<updated>2026-01-08T07:31:55+00:00</updated>
<author>
<name>Nicolas Ferre</name>
<email>nicolas.ferre@microchip.com</email>
</author>
<published>2026-01-02T17:01:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=94ad504e67cd3be94fa1b2fed0cb87da0d8f9396'/>
<id>urn:sha1:94ad504e67cd3be94fa1b2fed0cb87da0d8f9396</id>
<content type='text'>
Fix the #size-cells property for i2c3 node and remove the dtbs_check
error telling that "#size-cells: 0 was expected" from schema
atmel,at91sam-i2c.yaml and i2c-controller.yaml.

Fixes: b51e4aea3ecf ("ARM: dts: microchip: sama7d65: Add FLEXCOMs to sama7d65 SoC")
Cc: stable@vger.kernel.org # 6.16+
Signed-off-by: Nicolas Ferre &lt;nicolas.ferre@microchip.com&gt;
Link: https://lore.kernel.org/r/20260102170135.70717-3-nicolas.ferre@microchip.com
Signed-off-by: Claudiu Beznea &lt;claudiu.beznea@tuxon.dev&gt;
</content>
</entry>
<entry>
<title>ARM: dts: microchip: sama7d65: fix the ranges property for flx9</title>
<updated>2026-01-08T07:31:55+00:00</updated>
<author>
<name>Hari Prasath Gujulan Elango</name>
<email>hari.prasathge@microchip.com</email>
</author>
<published>2026-01-02T17:01:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=aabc977aa472ccf756372ae594d890022c19c9c8'/>
<id>urn:sha1:aabc977aa472ccf756372ae594d890022c19c9c8</id>
<content type='text'>
Update the ranges property for the flexcom9 as per the datasheet and
align with the reg property.

Fixes: b51e4aea3ecf ("ARM: dts: microchip: sama7d65: Add FLEXCOMs to sama7d65 SoC")
Cc: stable@vger.kernel.org # 6.16+
Signed-off-by: Hari Prasath Gujulan Elango &lt;hari.prasathge@microchip.com&gt;
Signed-off-by: Nicolas Ferre &lt;nicolas.ferre@microchip.com&gt;
Link: https://lore.kernel.org/r/20260102170135.70717-2-nicolas.ferre@microchip.com
Signed-off-by: Claudiu Beznea &lt;claudiu.beznea@tuxon.dev&gt;
</content>
</entry>
<entry>
<title>ARM: dts: microchip: lan966x: Fix the access to the PHYs for pcb8290</title>
<updated>2025-12-30T15:11:17+00:00</updated>
<author>
<name>Horatiu Vultur</name>
<email>horatiu.vultur@microchip.com</email>
</author>
<published>2025-11-19T13:47:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=d1a6f1259b0bb415107e83f6403a2ecb945d042f'/>
<id>urn:sha1:d1a6f1259b0bb415107e83f6403a2ecb945d042f</id>
<content type='text'>
The problem is that the MDIO controller can't detect any of the PHYs.
The reason is that the lan966x is not pulling high the GPIO 53 that is
connected to the PHYs reset GPIO. Without doing this the PHYs are kept
in reset. The mdio controller framework has the possibility to control a
GPIO to release the reset of the PHYs. So take advantage of this and set
line to be high before accessing the PHYs.

Signed-off-by: Horatiu Vultur &lt;horatiu.vultur@microchip.com&gt;
Reviewed-by: Claudiu Beznea &lt;claudiu.beznea@tuxon.dev&gt;
Reviewed-by: Andrew Lunn &lt;andrew@lunn.ch&gt;
Link: https://lore.kernel.org/r/20251119134750.394655-1-horatiu.vultur@microchip.com
[claudiu.beznea: add microchip in patch title, s/possiblity/possibility
 in patch description]
Signed-off-by: Claudiu Beznea &lt;claudiu.beznea@tuxon.dev&gt;
</content>
</entry>
</feed>
