<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/arch/arm/boot/dts/microchip, branch master</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=master</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=master'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2026-04-17T03:28:48+00:00</updated>
<entry>
<title>Merge tag 'soc-dt-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc</title>
<updated>2026-04-17T03:28:48+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2026-04-17T03:28:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=e65f4718a577fcc84d40431f022985898b6dbf2e'/>
<id>urn:sha1:e65f4718a577fcc84d40431f022985898b6dbf2e</id>
<content type='text'>
Pull SoC devicetree updates from Arnd Bergmann:
 "A number of SoC platforms are adding modernized variants of their
  already supported chips time, with a total of 12 new SoCs, and two
  older SoC getting removed:

   - Qualcomm Glymur is a compute SoC using 18 Oryon-2 CPU cores
   - Qualcomm Mahua is a variant of Glymur with only 12 CPU cores, but
     largely identical.
   - Qualcomm Eliza is an embeded platform for mobile phone (SM7750) and
     IOT (QC7790S/M) workloads
   - Qualcomm IPQ5210 is a wireless networking SoC using Cortex-A53
     cores
   - Qualcomm apq8084 and ipq806x had only rudimentary support but no
     actual products using them, so they are now gone.
   - Axis ARTPEC-9 is a follow-up to the ARTPEC-8 embedded SoC, using
     the Samsung SoC platform but now with Cortex-A55 cores
   - ARM Zena is a virtual platform in FVP using Cortex-A720AE cores,
     with additional versions planned to be merged in the future.
   - ARM corstone-1000-a320 is a reference platform for IOT, using
     low-end Cortex-A320 cores
   - Microchip LAN9691 is an updated 64-bit variant of the arm32 lan966x
     series of networking SoCs
   - Microchip PIC64GX is an embedded RISC-V chip using SIFIVE U54 CPU
     cores
   - Rockchip RV1103B is the low-end 32-bit single-core vision processor
   - Renesas RZ/G3L (r9a08g046) is an industrial embedded chip using
     Cortex-A55 cores, similar to the G3E and G3S variants we already
     supported.
   - NXP S32N79 is an automotive SoC using Cortex-A78AE cores, a
     significant upgrade from the older S32V and S32G series

  These all come with at least one reference board or an initial product
  using these, in total there are 67 newly added boards. The ones for
  already supported SoCs are:

   - Two more Aspeed BMC based boards
   - Three older tablets based on 32-bit OMAP4 and Exynos5 SoCs
   - One Set-top-box based on Allwinner H6
   - 22 additional industrial/embedded boards using 64-bit NXP i.MX8M or
     i.MX9 SoCs
   - 20 Qualcomm SoC based machines across all possible markets:
     workstation, gaming, laptop, phone, networking, reference, ...
   - Three more Rockchips rk35xx based boards
   - Four variants of the Toradex Verdin using TI AM62

  Other notable bits are:

   - A cleanup for the 32-bit Tegra paz00 board moved the last board
     specific code on Tegra into equivalent dts syntax.
   - There continues to be a significant number of fixes for static
     checking of dtc syntax, but it feels like this is slowing down,
     hopefully getting into a state where most known issues are
     addressed
   - Additional hardware support for many existing boards across SoC
     families, notably Qualcomm, Broadcom, i.MX2, i.MX6, Rockchips,
     STM32, Mediatek, Tegra, TI and Microchip"

* tag 'soc-dt-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (841 commits)
  arm64: dts: ti: k3: Use memory-region-names for r5f
  ARM: dts: imx: Add DT overlays for DH i.MX6 DHCOM SoM and boards
  ARM: dts: imx6sx: remove fallback compatible string fsl,imx28-lcdif
  ARM: dts: imx25: rename node name tcq to touchscreen
  ARM: dts: imx: b850v3: Disable unused usdhc4
  ARM: dts: imx: b850v3: Define GPIO line names
  ARM: dts: imx: b850v3: Use alphabetical sorting
  ARM: dts: imx: bx50v3: Configure phy-mode to eliminate a warning
  ARM: dts: imx: bx50v3: Configure switch PHY max-speed to 100Mbps
  ARM: dts: imx7ulp: Add CPU clock and OPP table support
  ARM: dts: imx7-mba7: Deassert BOOT_EN after boot
  ARM: dts: tqma7: add boot phase properties
  ARM: dts: imx7s: add boot phase properties
  ARM: dts: tqma6ul[l]: correct spelling of TQ-Systems
  ARM: dts: mba6ulx: add boot phase properties
  ARM: dts: imx6ul[l]-tqma6ul[l]: add boot phase properties
  ARM: dts: imx6ul/imx6ull: add boot phase properties
  ARM: dts: imx6qdl-mba6: add boot phase properties
  ARM: dts: imx6qdl-tqma6: add boot phase properties
  ARM: dts: imx6qdl: add boot phase properties
  ...
</content>
</entry>
<entry>
<title>ARM: dts: microchip: sama7d65: add Cortex-A7 PMU node</title>
<updated>2026-03-24T13:35:37+00:00</updated>
<author>
<name>Mihai Sain</name>
<email>mihai.sain@microchip.com</email>
</author>
<published>2026-03-24T07:09:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=7d7a9fc1310a0ade8ea61c5eb4d8b29456f8d604'/>
<id>urn:sha1:7d7a9fc1310a0ade8ea61c5eb4d8b29456f8d604</id>
<content type='text'>
Add the Performance Monitoring Unit (PMU) node with the appropriate
compatible string and interrupt line so that perf and other
PMU-based tooling can function correctly on this SoC.

[root@SAMA7D65 ~]$ dmesg | grep -i pmu
[    1.487869] hw-perfevents: enabled with armv7_cortex_a7 PMU driver, 5 (8000000f) counters available

[root@SAMA7D65 ~]$ perf list hw
List of pre-defined events (to be used in -e or -M):

branch-instructions OR branches                    [Hardware event]
branch-misses                                      [Hardware event]
bus-cycles                                         [Hardware event]
cache-misses                                       [Hardware event]
cache-references                                   [Hardware event]
cpu-cycles OR cycles                               [Hardware event]
instructions                                       [Hardware event]

Signed-off-by: Mihai Sain &lt;mihai.sain@microchip.com&gt;
Link: https://lore.kernel.org/r/20260324070927.1496-2-mihai.sain@microchip.com
[claudiu.beznea: keep nodes alphanumerically sorted]
Signed-off-by: Claudiu Beznea &lt;claudiu.beznea@tuxon.dev&gt;
</content>
</entry>
<entry>
<title>ARM: dts: microchip: sam9x7: fix gpio-lines count for pioB</title>
<updated>2026-03-23T10:54:24+00:00</updated>
<author>
<name>Mihai Sain</name>
<email>mihai.sain@microchip.com</email>
</author>
<published>2026-02-09T09:07:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=907150bbe566e23714a25d7bcb910f236c3c44c0'/>
<id>urn:sha1:907150bbe566e23714a25d7bcb910f236c3c44c0</id>
<content type='text'>
The pioB controller on the SAM9X7 SoC actually supports 27 GPIO lines.
The previous value of 26 was incorrect, leading to the last pin being
unavailable for use by the GPIO subsystem.
Update the #gpio-lines property to reflect
the correct hardware specification.

Fixes: 41af45af8bc3 ("ARM: dts: at91: sam9x7: add device tree for SoC")
Signed-off-by: Mihai Sain &lt;mihai.sain@microchip.com&gt;
Link: https://lore.kernel.org/r/20260209090735.2016-1-mihai.sain@microchip.com
Signed-off-by: Claudiu Beznea &lt;claudiu.beznea@tuxon.dev&gt;
</content>
</entry>
<entry>
<title>arm: dts: microchip: remove unused #address-cells/#size-cells from sam9x60 udc node</title>
<updated>2026-03-08T16:06:52+00:00</updated>
<author>
<name>Charan Pedumuru</name>
<email>charan.pedumuru@gmail.com</email>
</author>
<published>2026-03-07T09:16:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=c52f2944492590c59599b0663f05611320efe441'/>
<id>urn:sha1:c52f2944492590c59599b0663f05611320efe441</id>
<content type='text'>
The UDC node does not define any child nodes, so the "#address-cells" and
"#size-cells" properties are unnecessary. Remove these unused properties
to simplify the devicetree node and keep it consistent with DT conventions.

Signed-off-by: Charan Pedumuru &lt;charan.pedumuru@gmail.com&gt;
Link: https://lore.kernel.org/r/20260307-atmel-usb-v3-1-3dc48fe772be@gmail.com
Reviewed-by: Claudiu Beznea &lt;claudiu.beznea@tuxon.dev&gt;
[claudiu.beznea: s/at91/microchip in commit title]
Signed-off-by: Claudiu Beznea &lt;claudiu.beznea@tuxon.dev&gt;
</content>
</entry>
<entry>
<title>ARM: dts: microchip: sama7d65: add LVDS controller</title>
<updated>2026-02-28T14:05:26+00:00</updated>
<author>
<name>Ryan Wanner</name>
<email>Ryan.Wanner@microchip.com</email>
</author>
<published>2026-02-25T08:54:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=d83734a0bd253cab38b52065b2e35fa34c2d8770'/>
<id>urn:sha1:d83734a0bd253cab38b52065b2e35fa34c2d8770</id>
<content type='text'>
Add support for LVDS controller node

Signed-off-by: Ryan Wanner &lt;Ryan.Wanner@microchip.com&gt;
Signed-off-by: Manikandan Muralidharan &lt;manikandan.m@microchip.com&gt;
Reviewed-by: Claudiu Beznea &lt;claudiu.beznea@tuxon.dev&gt;
Link: https://lore.kernel.org/r/20260225085430.480052-4-manikandan.m@microchip.com
Signed-off-by: Claudiu Beznea &lt;claudiu.beznea@tuxon.dev&gt;
</content>
</entry>
<entry>
<title>ARM: dts: microchip: sama7d65: add LCD controller</title>
<updated>2026-02-28T14:05:01+00:00</updated>
<author>
<name>Ryan Wanner</name>
<email>Ryan.Wanner@microchip.com</email>
</author>
<published>2026-02-25T08:54:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=b18c8aea6d962bfd89c6c265d7656eb45cc0e432'/>
<id>urn:sha1:b18c8aea6d962bfd89c6c265d7656eb45cc0e432</id>
<content type='text'>
Add support for LCD controller node

Signed-off-by: Ryan Wanner &lt;Ryan.Wanner@microchip.com&gt;
Signed-off-by: Manikandan Muralidharan &lt;manikandan.m@microchip.com&gt;
Reviewed-by: Claudiu Beznea &lt;claudiu.beznea@tuxon.dev&gt;
Link: https://lore.kernel.org/r/20260225085430.480052-2-manikandan.m@microchip.com
[claudiu.beznea: add a space b/w the node address and the next '{']
Signed-off-by: Claudiu Beznea &lt;claudiu.beznea@tuxon.dev&gt;
</content>
</entry>
<entry>
<title>Merge tag 'soc-dt-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc</title>
<updated>2026-02-11T05:11:08+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2026-02-11T05:11:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=6589b3d76db2d6adbf8f2084c303fb24252a0dc6'/>
<id>urn:sha1:6589b3d76db2d6adbf8f2084c303fb24252a0dc6</id>
<content type='text'>
Pull SoC devicetree updates from Arnd Bergmann:
 "There are a handful of new SoCs this time, all of these are more or
  less related to chips in a wider family:

   - SpacemiT Key Stone K3 is an 8-core risc-v chip, and the first
     widely available RVA23 implementation. Note that this is entirely
     unrelated with the similarly named Texas Instruments K3 chip family
     that follwed the TI Keystone2 SoC.

   - The Realtek Kent family of SoCs contains three chip models
     rtd1501s, rtd1861b and rtd1920s, and is related to their earlier
     Set-top-box and NAS products such as rtd1619, but is built on newer
     Arm Cortex-A78 cores.

   - The Qualcomm Milos family includes the Snapdragon 7s Gen 3 (SM7635)
     mobile phone SoC built around Armv9 Kryo cores of the Arm
     Cortex-A720 generation. This one is used in the Fairphone Gen 6

   - Qualcomm Kaanapali is a new SoC based around eight high performance
     Oryon CPU cores

   - NXP i.MX8QP and i.MX952 are both feature reduced versions of chips
     we already support, i.e. the i.MX8QM and i.MX952, with fewer CPU
     cores and I/O interfaces.

  As part of a cleanup, a number of SoC specific devicetree files got
  removed because they did not have a single board using the .dtsi files
  and they were never compile tested as a result: Samsung s3c6400, ST
  spear320s, ST stm32mp21xc/stm32mp23xc/stm32mp25xc, Renesas
  r8a779m0/r8a779m2/r8a779m4/r8a779m6/r8a779m7/r8a779m8/r8a779mb/
  r9a07g044c1/r9a07g044l1/r9a07g054l1/r9a09g047e37, and TI
  am3703/am3715. All of these could be restored easily if a new board
  gets merged.

  Broadcom/Cavium/Marvell ThunderX2 gets removed along with its only
  machine, as all remaining users are assumed to be using ACPI based
  firmware.

  A relatively small number of 43 boards get added this time, and almost
  all of them for arm64. Aside from the reference boards for the newly
  added SoCs, this includes:

   - Three server boards use 32-bit ASpeed BMCs

   - One more reference board for 32-bit Microchip LAN9668

   - 64-bit Arm single-board computers based on Amlogic s905y4, CIX
     sky1, NXP ls1028a/imx8mn/imx8mp/imx91/imx93/imx95, Qualcomm
     qcs6490/qrb2210 and Rockchip rk3568/rk3588s

   - Carrier board for SOMs using Intel agilex5, Marvell Armada 7020,
     NXP iMX8QP, Mediatek mt8370/mt8390 and rockchip rk3588

   - Two mobile phones using Snapdragon 845

   - A gaming device and a NAS box, both based on Rockchips rk356x

  On top of the newly added boards and SoCs, there is a lot of
  background activity going into cleanups, in particular towards getting
  a warning-free dtc build, and the usual work on adding support for
  more hardware on the previously added machines"

* tag 'soc-dt-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (757 commits)
  dt-bindings: intel: Add Agilex eMMC support
  arm64: dts: socfpga: agilex: add emmc support
  arm64: dts: intel: agilex5: Add simple-bus node on top of dma controller node
  ARM: dts: socfpga: fix dtbs_check warning for fpga-region
  ARM: dts: socfpga: add #address-cells and #size-cells for sram node
  dt-bindings: altera: document syscon as fallback for sys-mgr
  arm64: dts: altera: Use lowercase hex
  dt-bindings: arm: altera: combine Intel's SoCFPGA into altera.yaml
  arm64: dts: socfpga: agilex5: Add IOMMUS property for ethernet nodes
  arm64: dts: socfpga: agilex5: add support for modular board
  dt-bindings: intel: Add Agilex5 SoCFPGA modular board
  arm64: dts: socfpga: agilex5: Add dma-coherent property
  arm64: dts: realtek: Add Kent SoC and EVB device trees
  dt-bindings: arm: realtek: Add Kent Soc family compatibles
  ARM: dts: samsung: Drop s3c6400.dtsi
  ARM: dts: nuvoton: Minor whitespace cleanup
  MAINTAINERS: Add Falcon DB
  arm64: dts: a7k: add COM Express boards
  ARM: dts: microchip: Drop usb_a9g20-dab-mmx.dtsi
  arm64: dts: rockchip: Fix rk3588 PCIe range mappings
  ...
</content>
</entry>
<entry>
<title>ARM: dts: microchip: Drop usb_a9g20-dab-mmx.dtsi</title>
<updated>2026-01-23T06:58:25+00:00</updated>
<author>
<name>Rob Herring (Arm)</name>
<email>robh@kernel.org</email>
</author>
<published>2026-01-22T20:23:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=e9ed88a4ce42bf42cd8b95a5b05298cf225b8b52'/>
<id>urn:sha1:e9ed88a4ce42bf42cd8b95a5b05298cf225b8b52</id>
<content type='text'>
This .dtsi file is not included anywhere in the tree and can't be
tested.

Acked-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
Signed-off-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
Link: https://lore.kernel.org/r/20260122202345.3387936-2-robh@kernel.org
Signed-off-by: Claudiu Beznea &lt;claudiu.beznea@tuxon.dev&gt;
</content>
</entry>
<entry>
<title>ARM: dts: Add support for pcb8385</title>
<updated>2026-01-09T06:55:55+00:00</updated>
<author>
<name>Horatiu Vultur</name>
<email>horatiu.vultur@microchip.com</email>
</author>
<published>2025-12-08T08:35:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=a8e30c9d856ddebad75abaec55c019a7a85b16da'/>
<id>urn:sha1:a8e30c9d856ddebad75abaec55c019a7a85b16da</id>
<content type='text'>
Add basic support for pcb8385 [1]. It is a modular board which allows
to add different daughter cards on which there are different PHYs.
This adds support for UART, LEDs and I2C.

[1] https://www.microchip.com/en-us/development-tool/ev83e85a

Signed-off-by: Horatiu Vultur &lt;horatiu.vultur@microchip.com&gt;
Link: https://lore.kernel.org/r/20251208083545.3642168-3-horatiu.vultur@microchip.com
Signed-off-by: Claudiu Beznea &lt;claudiu.beznea@tuxon.dev&gt;
</content>
</entry>
<entry>
<title>ARM: dts: microchip: sama7d65: add missing flexcom nodes</title>
<updated>2026-01-08T07:32:49+00:00</updated>
<author>
<name>Nicolas Ferre</name>
<email>nicolas.ferre@microchip.com</email>
</author>
<published>2026-01-02T17:01:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=d08fc1f551b51816c8d9c4c4a1b8d1cc1e6c0806'/>
<id>urn:sha1:d08fc1f551b51816c8d9c4c4a1b8d1cc1e6c0806</id>
<content type='text'>
Add nodes for usart, spi and i2c when missing to the
flexcom nodes.

Signed-off-by: Nicolas Ferre &lt;nicolas.ferre@microchip.com&gt;
Link: https://lore.kernel.org/r/20260102170135.70717-6-nicolas.ferre@microchip.com
Signed-off-by: Claudiu Beznea &lt;claudiu.beznea@tuxon.dev&gt;
</content>
</entry>
</feed>
