kernel/linux.git/arch/arc/plat-sim, branch linux-4.16.yLinux kernel stable tree (mirror)https://git.radix-linux.su/kernel/linux.git/atom?h=linux-4.16.y2017-08-04T08:19:47+00:00ARC: [plat-sim] Include this platform unconditionally2017-08-04T08:19:47+00:00Vineet Guptavgupta@synopsys.com2017-07-28T11:23:50+00:00urn:sha1:33460f86ad2c982f3172a10b17948ccaf923f07f
Essentially remove CONFIG_ARC_PLAT_SIM
There is no need for any platform specific code, just the board DTS
match strings which we can include unconditionally
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
ARC: [plat-*] ARC_HAS_COH_CACHES no longer relevant2017-02-06T17:37:57+00:00Vineet Guptavgupta@synopsys.com2017-02-02T17:09:50+00:00urn:sha1:8ba605b607b7278548c1092b2ac36381627f0839
A typical SMP system expects cache coherency. Initial NPS platform
support was slated to be SMP w/o cache coherency.
However it seems the platform now selects that option, so there is no
point in keeping it around.
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
ARCv2: Add support for ZeBu Emulation platform for HS cores2016-09-30T21:48:15+00:00Vineet Guptavgupta@synopsys.com2015-05-11T13:16:22+00:00urn:sha1:9efac6798b20ae6b63ce244b569755f3b60d80aa
The cool thing is that same kernel image can run on
- nsim OSCI simulation platform
- SDPlite FPGA setups
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
ARC: remove extraneous header include2015-11-14T07:41:38+00:00Vineet Guptavgupta@synopsys.com2015-10-30T19:17:39+00:00urn:sha1:76a8c40c65a2fc9e526fcba97c0cd1a6ecbd3438
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
ARCv2: smp: [plat-*]: No need to explicitly call mcip_init_smp()2015-10-28T10:43:41+00:00Vineet Guptavgupta@synopsys.com2015-10-12T09:45:48+00:00urn:sha1:aa0efcde45a36d1ea2bc5bde4d47f36ec17502de
MCIP now registers it's own per cpu setup routine (for IPI IRQ request)
using smp_ops.init_irq_cpu().
So no need for platforms to do that. This now completely decouples
platforms from MCIP.
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
ARCv2: smp: [plat-*]: No need to explicitly call mcip_init_early_smp()2015-10-28T10:43:40+00:00Vineet Guptavgupta@synopsys.com2015-10-12T11:08:07+00:00urn:sha1:26b8f996239884451aeb1213747e3ca808c26024
MCIP now registers it's own probe callback with smp_ops.init_early_smp()
which is called by ARC common code, so no need for platforms to do that.
This decouples the platforms and MCIP and helps confine MCIP details
to it's own file.
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
ARCv2: [nsim*hs*] Support simulation platforms for HS38x cores2015-06-25T00:30:19+00:00Vineet Guptavgupta@synopsys.com2015-03-09T09:00:19+00:00urn:sha1:a12ebe16a5cea66c17a621ece3a557b8afda2361
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
ARCv2: SMP: Support ARConnect (MCIP) for Inter-Core-Interrupts et al2015-06-22T08:36:56+00:00Vineet Guptavgupta@synopsys.com2014-09-10T13:35:38+00:00urn:sha1:82fea5a1bbbe8c3b56d5f3efbf8880c7b25b1758
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
ARC: [plat_arcfpga]->[plat_sim]2015-06-19T12:39:26+00:00Vineet Guptavgupta@synopsys.com2015-02-20T13:42:18+00:00urn:sha1:fd1557923b2e45a7ff4664bd88311d8239d69ca9
* Remove remanants of legacy ARC FPGA platforms (AA4, ML509...)
* Only nsim simulation platform is left, rename platform accordingly
* AA4 DT stuff is compatible with nsim for ARC700 so rename it too
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>