<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/arch/arc/include/asm/entry-compact.h, branch v6.6.134</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.6.134</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v6.6.134'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2023-08-18T17:30:07+00:00</updated>
<entry>
<title>ARC: entry: Add more common chores to EXCEPTION_PROLOGUE</title>
<updated>2023-08-18T17:30:07+00:00</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@kernel.org</email>
</author>
<published>2020-05-20T07:39:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=13347c10396055c4c6c38a54d10bc6ed5024fbe9'/>
<id>urn:sha1:13347c10396055c4c6c38a54d10bc6ed5024fbe9</id>
<content type='text'>
THe high level structure of most ARC exception handlers is
 1. save regfile with EXCEPTION_PROLOGUE
 2. setup r0: EFA (not part of pt_regs)
 3. setup r1: pointer to pt_regs (SP)
 4. drop down to pure kernel mode (from exception)
 5. call the Linux "C" handler

Remove the boiler plate code by moving #2, #3, #4 into #1.

The exceptions to most exceptions are syscall Trap and Machine check
which don't do some of above for various reasons, so call a newly
introduced variant EXCEPTION_PROLOGUE_KEEP_AE (same as original
EXCEPTION_PROLOGUE)

Tested-by: Pavel Kozlov &lt;Pavel.Kozlov@synopsys.com&gt;
Signed-off-by: Vineet Gupta &lt;vgupta@kernel.org&gt;
</content>
</entry>
<entry>
<title>ARC: entry: rework (non-functional)</title>
<updated>2023-08-18T03:31:59+00:00</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@kernel.org</email>
</author>
<published>2020-05-19T23:01:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=c505b0da76a67139e073a5a5c4a1986b1cf168d3'/>
<id>urn:sha1:c505b0da76a67139e073a5a5c4a1986b1cf168d3</id>
<content type='text'>
 - comments update
 - rename syscall_trace_entry
 - use PT_xxx in entry code

Signed-off-by: Vineet Gupta &lt;vgupta@kernel.org&gt;
</content>
</entry>
<entry>
<title>ARC: entry: use gp to cache task pointer (vs. r25)</title>
<updated>2023-08-18T03:31:59+00:00</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@kernel.org</email>
</author>
<published>2020-05-13T05:18:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=cfca4b5abe0cc13f9d9f45f760efd8260e31200f'/>
<id>urn:sha1:cfca4b5abe0cc13f9d9f45f760efd8260e31200f</id>
<content type='text'>
The motivation is eventual ABI considerations for ARCv3 but even without
it this change us worthwhile as diffstat reduces 100 net lines

r25 is a callee saved register, normally not saved by entry code in
pt_regs. However because of its usage in CONFIG_ARC_CURR_IN_REG it needs
to be. This in turn requires a whole bunch of special casing when we
need to access r25. Then there is distinction between user mode r25 vs.
kernel mode r25 - hence distinct SAVE_CALLEE_SAVED_{USER,KERNEL}

Instead use gp which is a scratch register and thus saved already in entry
code. This cleans things up significantly and much nocer on eyes:

 - SAVE_CALLEE_SAVED_{USER,KERNEL} are now exactly same
 - no special user_r25 slot in pt_reggs

Note that typical global asm registers are callee-saved (r25), but gp is
not callee-saved thus needs additional -ffixed-&lt;reg&gt; toggle

Signed-off-by: Vineet Gupta &lt;vgupta@kernel.org&gt;
</content>
</entry>
<entry>
<title>ARC: Fix comment typo</title>
<updated>2022-10-17T23:32:11+00:00</updated>
<author>
<name>Zhang Jiaming</name>
<email>jiaming@nfschina.com</email>
</author>
<published>2022-06-23T07:46:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=6e32c89c0f67b481ec17de69e556907d6445f91e'/>
<id>urn:sha1:6e32c89c0f67b481ec17de69e556907d6445f91e</id>
<content type='text'>
Change 'seperate' to 'separate'.

Signed-off-by: Zhang Jiaming &lt;jiaming@nfschina.com&gt;
Signed-off-by: Vineet Gupta &lt;vgupta@kernel.org&gt;
</content>
</entry>
<entry>
<title>ARC: mm: use SCRATCH_DATA0 register for caching pgdir in ARCv2 only</title>
<updated>2021-08-24T21:25:48+00:00</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@kernel.org</email>
</author>
<published>2020-01-13T17:16:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=6128df5be48f48d63efdc7c52022dd163f612373'/>
<id>urn:sha1:6128df5be48f48d63efdc7c52022dd163f612373</id>
<content type='text'>
MMU SCRATCH_DATA0 register is intended to cache task pgd. However in
ARC700 SMP port, it has to be repurposed for re-entrant interrupt
handling, while UP port doesn't. We currently handle these use-cases
using a fabricated #define which has usual issues of dependency nesting
and obvious ugliness.

So clean this up: for ARC700 don't use to cache pgd (even in UP) and do
the opposite for ARCv2.

And while here, switch to canonical pgd_offset().

Acked-by: Mike Rapoport &lt;rppt@linux.ibm.com&gt;
Signed-off-by: Vineet Gupta &lt;vgupta@kernel.org&gt;
</content>
</entry>
<entry>
<title>ARC: [plat-eznps]: Drop support for EZChip NPS platform</title>
<updated>2020-10-06T04:02:29+00:00</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2020-08-26T01:37:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=dd7c7ab01a04d645b7e7baa8530bfd81e31a2202'/>
<id>urn:sha1:dd7c7ab01a04d645b7e7baa8530bfd81e31a2202</id>
<content type='text'>
NPS customers are no longer doing active development, as evident from
rand config build failures reported in recent times, so drop support
for NPS platform.

Tested-by: kernel test robot &lt;lkp@intel.com&gt;
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARCv2: mm: TLB Miss optim: SMP builds can cache pgd pointer in mmu scratch reg</title>
<updated>2019-10-28T19:12:31+00:00</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2014-11-13T13:57:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=cfd9d70a855edf6adb37d0ed88be9e35274dbe49'/>
<id>urn:sha1:cfd9d70a855edf6adb37d0ed88be9e35274dbe49</id>
<content type='text'>
ARC700 exception (and intr handling) didn't have auto stack switching
thus had to rely on stashing a reg temporarily (to free it up) at a
known place in memory, allowing to code up the low level stack switching.
This however was not re-entrant in SMP which thus had to repurpose the
per-cpu MMU SCRATCH DATA register otherwise used to "cache" the task pdg
pointer (vs. reading it from mm struct)

The newer HS cores do have auto-stack switching and thus even SMP builds
can use the MMU SCRATCH reg as originally intended.

This patch fixes the restriction to ARC700 SMP builds only

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARC: entry: EV_Trap expects r10 (vs. r9) to have exception cause</title>
<updated>2019-07-08T08:24:44+00:00</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2019-05-15T23:08:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=68e5c6f073bcf70da5f8eef88eb2d98f7c560bb6'/>
<id>urn:sha1:68e5c6f073bcf70da5f8eef88eb2d98f7c560bb6</id>
<content type='text'>
avoids 1 MOV instruction in light of double load/store code

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500</title>
<updated>2019-06-19T15:09:55+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2019-06-04T08:11:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=d2912cb15bdda8ba4a5dd73396ad62641af2f520'/>
<id>urn:sha1:d2912cb15bdda8ba4a5dd73396ad62641af2f520</id>
<content type='text'>
Based on 2 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation #

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 4122 file(s).

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Enrico Weigelt &lt;info@metux.net&gt;
Reviewed-by: Kate Stewart &lt;kstewart@linuxfoundation.org&gt;
Reviewed-by: Allison Randal &lt;allison@lohutok.net&gt;
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>ARC: [arcompact] entry.S: minor code movement</title>
<updated>2018-07-09T18:25:45+00:00</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2018-06-27T23:00:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=ca1147fc2487335e9d1d7a931996eae176863a4c'/>
<id>urn:sha1:ca1147fc2487335e9d1d7a931996eae176863a4c</id>
<content type='text'>
This is a non functional code changw, which moves r25 restore from macro
into the caller of macro

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
</feed>
