kernel/linux.git/arch/arc/include/asm/arcregs.h, branch linux-4.16.y

ARCv2: boot log: updates for HS48: dual-issue, ECC, Loop Buffer

2017-11-13T22:37:39+00:00

Print the hardware support for ECC, Loop Buffer as well as the runtime enabled status Note that unlike the existing boot printing, this one is not read from pre-decoded hardware capabilty info cached in cpuinfo[] struct. Instead we read the AUX regs on the spot and print it, without botherign to save anywhere. There is no point in saving static hardware capabilites in memory when its use is very sporadic and non-performance critical, mainly for /proc/cpuinfo. This gets worse in SMP, given it is per-cpu, and pretty much exactly same across all cpus. So only info needed at runtime (e.g. TLB geometry) needs to be cached in cpuinfo[]. So going fwd we will start converting code to this paradigm. Signed-off-by: Vineet Gupta

ARCv2: boot log: identify HS48 cores (dual issue)

2017-10-04T03:36:49+00:00

Signed-off-by: Vineet Gupta

ARC: boot log: decontaminate ARCv2 ISA_CONFIG register

2017-10-04T03:36:49+00:00

ARCv2 ISA_CONFIG and ARC700_BUILD build config registers are not compatible. cpuinfo_arc had isa info placeholder which was mashup of bits form both. Untangle this by defining it off of ARCv2 ISA info and it is fine even for ARC700 since former is a super set of latter (ARC700 buildonly has 2 bits for atomics and stack check). At runtime, we treat ARCv2 ISA info as a generic placeholder but populate it correctly depending on ARC700 or HS. This paves way for adding more HS specific bits in isa info which was colliding with the extra bits for arc700. Signed-off-by: Vineet Gupta

ARCv2: intc: Use ARC_REG_STATUS32 for addressing STATUS32 reg

2017-02-06T17:37:57+00:00

It is better to use it instead of magic numbers. Signed-off-by: Yuriy Kolerov Signed-off-by: Vineet Gupta

ARC: mm: No need to save cache version in @cpuinfo

2016-12-19T19:54:41+00:00

Historical MMU revisions have been paired with Cache revision updates which are captured in MMU and Cache Build Configuration Registers respectively. This was used in boot code to check for configurations mismatches, speically in simulations (such as running with non existent caches, non pairing MMU and Cache version etc). This can instead be inferred from other cache params such as line size. So remove @ver from post processed @cpuinfo which could be used later to save soem other interesting info. Signed-off-by: Vineet Gupta

ARC: breakout timer include code into separate header ...

2016-11-30T19:54:25+00:00

... which allows for use in drivers/clocksource later Signed-off-by: Vineet Gupta

ARC: breakout aux handling into a separate header

2016-11-30T19:54:25+00:00

ARC timers use aux registers for programming and this paves way for moving ARC timer drivers into drivers/clocksource Signed-off-by: Vineet Gupta

ARC: change return value of userspace cmpxchg assist syscall

2016-11-07T19:01:12+00:00

The original syscall only used to return errno to indicate if cmpxchg succeeded. It was not returning the "previous" value which typical cmpxchg callers are interested in to build their slowpaths or retry loops. Given user preemption in syscall return path etc, it is not wise to check this in userspace afterwards, but should be what kernel actually observed in the syscall. So change the syscall interface to always return the previous value and additionally set Z flag to indicate whether operation succeeded or not (just like ARM implementation when they used to have this syscall) The flag approach avoids having to put_user errno which is nice given the use case for this syscall cares mostly about the "previous" value. Signed-off-by: Vineet Gupta

ARC: boot log: refactor cpu name/release printing

2016-10-28T17:09:07+00:00

The motivation is to identify ARC750 vs. ARC770 (we currently print generic "ARC700"). A given ARC700 release could be 750 or 770, with same ARCNUM (or family identifier which is unfortunate). The existing arc_cpu_tbl[] kept a single concatenated string for core name and release which thus doesn't work for 750 vs. 770 identification. So split this into 2 tables, one with core names and other with release. And while we are at it, get rid of the range checking for family numbers. We just document the known to exist cores running Linux and ditch others. With this in place, we add detection of ARC750 which is - cores 0x33 and before - cores 0x34 and later with MMUv2 Signed-off-by: Vineet Gupta

ARC: boot log: don't assume SWAPE instruction support

2016-10-28T17:09:06+00:00

This came to light when helping a customer with oldish ARC750 core who were getting instruction errors because of lack of SWAPE but boot log was incorrectly printing it as being present Signed-off-by: Vineet Gupta