Linux kernel stable tree (mirror) https://git.radix-linux.su/kernel/linux.git/atom?h=v7.0-rc7 2026-01-23T18:59:34+00:00 2026-01-23T18:59:34+00:00 Jani Nikula jani.nikula@intel.com 2026-01-23T14:31:49+00:00 urn:sha1:a592a36e49372172d7c7551ec19ed18184c935e1 The root document usually has a special :ref:`genindex` link to the generated index. This is also the case for Documentation/index.rst. The other index.rst files deeper in the directory hierarchy usually don't. For SPHINXDIRS builds, the root document isn't Documentation/index.rst, but some other index.rst in the hierarchy. Currently they have a ".. only::" block to add the index link when doing SPHINXDIRS html builds. This is obviously very tedious and repetitive. The link is also added to all index.rst files in the hierarchy for SPHINXDIRS builds, not just the root document. Put the boilerplate in a sphinx-includes/subproject-index.rst file, and include it at the end of the root document for subproject builds in an ad-hoc source-read extension defined in conf.py. For now, keep having the boilerplate in translations, because this approach currently doesn't cover translated index link headers. Cc: Jonathan Corbet <corbet@lwn.net> Cc: Mauro Carvalho Chehab <mchehab@kernel.org> Cc: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Tested-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Reviewed-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> [jc: did s/doctree/kern_doc_dir/ ] Signed-off-by: Jonathan Corbet <corbet@lwn.net> Message-ID: <20260123143149.2024303-1-jani.nikula@intel.com> 2025-12-16T23:28:51+00:00 Jarkko Nikula jarkko.nikula@linux.intel.com 2025-11-24T13:28:15+00:00 urn:sha1:dde7e21311004a6d227b628f14c582313da90bde Add SMBus PCI IDs on Intel Nova Lake-S. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20251124132816.470599-1-heikki.krogerus@linux.intel.com 2025-10-27T13:17:15+00:00 Zeng Guang guang.zeng@intel.com 2025-10-21T07:35:22+00:00 urn:sha1:90f690a4f5f962d90483e7f689261d9179e6fbbe Add SMBus PCI ID on Intel Diamond Rapids. Signed-off-by: Zeng Guang <guang.zeng@intel.com> Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20251021073522.3458383-1-heikki.krogerus@linux.intel.com 2025-09-27T22:45:53+00:00 Jarkko Nikula jarkko.nikula@linux.intel.com 2025-08-08T13:09:56+00:00 urn:sha1:cb3005d4c490fe2489accd5408592683d705b455 Add SMBus IDs on Intel Wildcat Lake-U. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> 2025-05-20T09:22:16+00:00 Sumanth Gavini sumanth.gavini@yahoo.com 2025-05-17T08:25:27+00:00 urn:sha1:64639da56bb6228752d586d4a11aa19802852c10 Fix misspelling reported by codespell Signed-off-by: Sumanth Gavini <sumanth.gavini@yahoo.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> 2024-11-18T07:35:47+00:00 Wolfram Sang wsa+renesas@sang-engineering.com 2024-11-18T07:35:47+00:00 urn:sha1:1b3073291ddbe23fede7e0dd1b6f5635e370f8ba i2c-host updates for v6.13, part 1 Major Improvements and Refactoring: - All controllers using the 'remove_new' callback have been reverted to use the 'remove' callback. - Intel SCH controller underwent significant refactoring, this brings love and a modern look to the driver. - PIIX4 driver refactored to enable usage by other drivers (e.g., AMD ASF). - iMX/MXC improved message handling to reduce protocol overhead: Refactored DMA/non-DMA read/write and bus polling mechanisms to achieve this. - ACPI documentation for PIIX4. New Features: - i2c-cadence added support for atomic transfers. - Qualcomm CII added support for a 32MHz serial engine clock. Deprecated Features: - Dropped outdated support for AMD756 S4882 and NFORCE2 S4985. If somebody misses this, Jean will rewrite support using the proper i2c mux framework. New Hardware Support: - Added support for: - Intel Panther Lake (new ID) - AMD ASF (new driver) - S32G2/S32G3 SoCs (new ID) - Realtek RTL I2C Controller (new driver) - HJMC01 DesignWare ACPI HID (new ID) - PIC64GX to Microchip Core (new ID) - Qualcomm SDM670 to Qualcomm CCI (new ID) 2024-11-17T10:58:57+00:00 Konstantin Aladyshev aladyshev22@gmail.com 2024-11-11T14:02:31+00:00 urn:sha1:1922bc245541bd08e3282d8199c8ac703e366111 Provide information how to reference I2C busses created by the PIIX4 chip driver from the ACPI code. Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bagas Sanjaya <bagasdotme@gmail.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> 2024-11-14T09:35:30+00:00 Christophe JAILLET christophe.jaillet@wanadoo.fr 2024-11-12T21:01:00+00:00 urn:sha1:397295d1be753cf0c798cacba0f8083413641dc1 Constify the i2c_device_id structure in the doc to give a cleaner starting point. Also remove an empty line which is usually not added. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> 2024-11-13T22:29:46+00:00 Jarkko Nikula jarkko.nikula@linux.intel.com 2024-09-23T13:27:19+00:00 urn:sha1:bd492b58371295d3ae26162b9666be584abad68a Add SMBus PCI IDs on Intel Panther Lake-P and -U. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> 2024-08-26T13:15:48+00:00 Wolfram Sang wsa+renesas@sang-engineering.com 2024-08-14T18:22:09+00:00 urn:sha1:3d16973f771a957d0afd58551b43b861eacc3127 To test SMBusAlert handlers, let the testunit be able to trigger SMBusAlert interrupts. This new command needs a GPIO connected to the SMBAlert# line. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>