kernel/linux.git/Documentation/gpu/amdgpu/dgpu-asic-info-table.csv, branch v6.18.21Linux kernel stable tree (mirror)https://git.radix-linux.su/kernel/linux.git/atom?h=v6.18.212025-08-06T18:16:47+00:00Documentation: Remove VCE support from OLAND's features2025-08-06T18:16:47+00:00Alexandre Demersalexandre.f.demers@gmail.com2025-08-03T02:27:31+00:00urn:sha1:1b392348de8ffc340545c62079645cb4695f5602
OLAND doesn't support VCE at all, but it does support UVD (3 or 4,
depending of the sources).
Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Documentation: add RDNA4 dGPUs2025-08-04T18:27:14+00:00Alex Deucheralexander.deucher@amd.com2025-07-28T15:21:19+00:00urn:sha1:8f249ba6ec607313c2dd5d6c8f99ad647c99af02
Add RDNA4 dGPUs to the dGPU table.
Link: https://www.amd.com/en/products/graphics/desktops/radeon/9000-series/amd-radeon-rx-9070xt.html
Link: https://www.amd.com/en/products/graphics/desktops/radeon/9000-series/amd-radeon-rx-9070.html
Link: https://www.amd.com/en/products/graphics/desktops/radeon/9000-series/amd-radeon-rx-9060xt.html
Link: https://www.amd.com/en/products/graphics/desktops/radeon/9000-series/amd-radeon-rx-9060xt-8gb.html
Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Documentation: update APU and dGPU tables with MP0/1 info2025-08-04T18:27:07+00:00Alex Deucheralexander.deucher@amd.com2025-07-28T15:15:40+00:00urn:sha1:810a8809ccc69a67af74f3bd63f4d99da08049e7
Add MP1 for APUs and MP0 and MP1 details for dGPUs.
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3905
Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Documentation/amdgpu: Clarify MI200 and MI300 entries2024-07-08T20:56:20+00:00Kent Russellkent.russell@amd.com2024-07-04T14:51:44+00:00urn:sha1:9e4c9ee0ba97a646298464a84314afe505f4c9b7
Add "Series" to MI200 and MI300 to clarify that they represent the
series of cards, and to more closely match the product information
materials. This also matches other entries in this list
Also correct a typo in the MI300 codename (Vangaram->Vanjaram)
Signed-off-by: Kent Russell <kent.russell@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: update documentation on new chips2024-01-29T20:34:07+00:00Alex Deucheralexander.deucher@amd.com2024-01-18T18:52:28+00:00urn:sha1:a91cf53a1077557f6b7ae6bdfdbc86804f26e79d
These have been released now, so add them to the documentation.
Acked-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Documentation/gpu: update dGPU asic info table2023-01-19T22:24:26+00:00Alex Deucheralexander.deucher@amd.com2023-01-18T21:07:10+00:00urn:sha1:b4a9b36e69e935104e52e561aa9a82d39b5efc36
Update to the latest launched dGPUs.
Link: https://www.amd.com/en/graphics/radeon-rx-graphics
Link: https://www.amd.com/en/graphics/amd-radeon-rx-laptops
Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Documentation/gpu: Add info table for ASICs2022-09-01T19:09:31+00:00Rodrigo SiqueiraRodrigo.Siqueira@amd.com2022-08-11T15:48:17+00:00urn:sha1:9d9b217d52b41f6d99279211b83c26b2484a142b
Amdgpu driver is used in an extensive range of devices, and each ASIC
has some specific configuration. As a result of this variety, sometimes
it is hard to identify the correct block that might cause the issue.
This commit expands the amdgpu kernel-doc to alleviate this issue by
introducing one ASIC table that describes dGPU and another one that
shares the APU info.
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Cc: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Cc: Hersen Wu <hersenxs.wu@amd.com>
Cc: Alex Hung <alex.hung@amd.com>
Cc: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Cc: Leo Li <sunpeng.li@amd.com>
Cc: Simon Ser <contact@emersion.fr>
Cc: Pekka Paalanen <pekka.paalanen@collabora.com>
Cc: Sean Paul <seanpaul@chromium.org>
Cc: Mark Yacoub <markyacoub@chromium.org>
Cc: Pierre-Loup <pgriffais@valvesoftware.com>
Cc: Michel Dänzer <michel.daenzer@mailbox.org>
Cc: Kent Russell <Kent.Russell@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>