kernel/linux.git/Documentation/devicetree/bindings/sram, branch v7.2-rc5

Merge tag 'devicetree-for-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

2026-06-17T18:54:57+00:00

Pull devicetree updates from Rob Herring: "DT core: - Add support for handling multiple cells in "iommu-map" entries - Support only 1 entry in /reserved-memory "reg" entries. Support for more than 1 entry has been broken - Fix a UAF on alloc_reserved_mem_array() failure - Make "ibm,phandle" handling logic specific to PPC - Use memcpy() instead of strcpy() for known length strings - Ensure __of_find_n_match_cpu_property() handles malformed "reg" entries - Add various checks that expected strings are strings before accessing them - Drop redundant memset() when unflattening DT DT bindings: - Add a DTS style checker. Currently hooked up to dt_binding_check to check examples - Convert st,nomadik platform, ti,omap-dmm, and ti,irq-crossbar bindings to DT schema - Add Apple System Management Controller hwmon, Qualcomm Hamoa Embedded Controller, Qualcomm IPQ6018 PWM controller, fsl,mc1323, Samsung SOFEF01-M DDIC panel, Freescale i.MX53 Television Encoder, Samsung S2M series PMIC extcon, and MT6365 PMIC AuxADC schemas - Extend bindings for QCom Maili and Nord PDC, QCom Hali fastrpc, qcom,eliza-imem, qcom,oryon-1-5 CPU, and MT6365 Keys - Consolidate "sram" property definitions - Fix constraints on "nvmem" properties which only contain phandles and no arg cells - Another pass of fixing "phandle-array" constraints - Add Gira vendor prefix" * tag 'devicetree-for-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (50 commits) dt-bindings: interrupt-controller: qcom,pdc: Add Maili compatible string dt-bindings: interrupt-controller: ti,irq-crossbar: Convert to DT schema dt-bindings: vendor-prefixes: add Gira dt-bindings: embedded-controller: Add Qualcomm reference device EC description dt-bindings: pwm: add IPQ6018 binding dt-bindings: hwmon: Add Apple System Management Controller hwmon schema docs: dt: writing-schema: Clarify what is required in a schema of: Respect #{iommu,msi}-cells in maps of: Factor arguments passed to of_map_id() into a struct of: Add convenience wrappers for of_map_id() of: reserved_mem: zero total_reserved_mem_cnt if no valid /reserved-memory entry of: reserved_mem: handle NULL name in of_reserved_mem_lookup() dt-bindings: cache: l2c2x0: Add missing power-domains dt-bindings: interrupt-controller: renesas,r9a09g077-icu: Fix reg size in example dt-bindings: nvmem: consumer: Make 'nvmem' an array of one-item entries drivers/of/overlay: Use memcpy() to copy known length strings dt-bindings: add self-test fixtures for style checker dt-bindings: wire style checker into dt_binding_check scripts/jobserver-exec: propagate child exit status dt-bindings: add DTS style checker ...

dt-bindings: Consolidate "sram" property definition

2026-05-15T23:19:30+00:00

The "sram" property has become a de facto standard property, so create a common schema for it and drop all the duplicated definitions. Reviewed-by: Linus Walleij Acked-by: Jakub Kicinski Acked-by: Mark Brown Reviewed-by: Liu Ying #fsl,imx8qxp-dc-command-sequencer.yaml Acked-by: Lorenzo Bianconi Acked-by: Vinod Koul Acked-by: Dmitry Baryshkov # display/msm Reviewed-by: Krzysztof Kozlowski Reviewed-by: Tanmay Shah Link: https://patch.msgid.link/20260511165942.2774868-1-robh@kernel.org Signed-off-by: Rob Herring (Arm)

dt-bindings: sram: Document qcom,eliza-imem

2026-05-05T15:31:50+00:00

Add compatible for Eliza SoC IMEM. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Alexander Koskovich Link: https://patch.msgid.link/20260418-eliza-imem-v3-2-bfbd499b6e77@pm.me Signed-off-by: Rob Herring (Arm)

dt-bindings: sram: sunxi-sram: Add H616 SRAM regions

2026-04-27T15:25:35+00:00

The Allwinner H616 has two switchable peripheral SRAM regions: - The VE SRAM is a 2 MB dedicated SRAM for the Video Engine. CPU access to this region is enabled by default. CPU access can be disabled, after which reads will show the same stale value for all addresses, while writes are ignored. The mux value for this region is different from previous generations. - The SRAM C region is an alias of the first 128 KB of VE SRAM, plus 64 KB of DE SRAM. The latter is otherwise unaccessible from the CPU. When CPU access is disabled, the whole region reads as zero, while writes are ignored. The mux value for this region is the same as on the A64 and H6. Add compatible strings for both of them. Acked-by: Rob Herring (Arm) Acked-by: Jernej Skrabec Link: https://patch.msgid.link/20260324164357.1607247-3-wens@kernel.org Signed-off-by: Chen-Yu Tsai

dt-bindings: sram: Document Allwinner H616 VE SRAM

2026-04-27T15:25:35+00:00

The Allwinner H616 has two switchable peripheral SRAM regions: - The VE SRAM is a 2 MB dedicated SRAM for the Video Engine. CPU access to this region is enabled by default. CPU access can be disabled, after which reads will show the same stale value for all addresses, while writes are ignored. The mux value for this region is different from previous generations, and thus needs a completely new compatible. - The SRAM C region is an alias of the first 128 KB of VE SRAM, plus 64 KB of DE SRAM. The latter is otherwise unaccessible from the CPU. When CPU access is disabled, the whole region reads as zero, while writes are ignored. The mux value for this region is the same as on the A64 and H6. The existing compatible for the A64 already covers this. Add the compatible for the VE SRAM to the list of covered compatibles in the generic SRAM region binding. Acked-by: Rob Herring (Arm) Acked-by: Jernej Skrabec Link: https://patch.msgid.link/20260324164357.1607247-2-wens@kernel.org Signed-off-by: Chen-Yu Tsai

Merge tag 'devicetree-for-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

2026-04-17T21:09:02+00:00

Pull devicetree updates from Rob Herring: "DT core: - Cleanup of the reserved memory code to keep CMA specifics in CMA code - Add and convert several users to new of_machine_get_match() helper - Validate nul termination in string properties - Update dtc to upstream v1.7.2-69-g53373d135579 - Limit matching reserved memory devices to /reserved-memory nodes - Fix some UAF in unittests - Remove Baikal SoC bus driver - Fix false DT_SPLIT_BINDING_PATCH checkpatch warning - Allow fw_devlink device-tree on x86 - Fix kerneldoc return description for of_property_count_elems_of_size() DT bindings: - Add fsl,imx25-aips, fsl,imx25-tcq, qcom,eliza-pdc, qcom,eliza-spmi-pmic-arb, qcom,hawi-imem, qcom,milos-imem, qcom,hawi-pdc, and lg,sw49410 bindings - Convert arm,vexpress-scc to DT schema - Deprecate Qualcomm generic CPU compatibles. Add Apple M3 CPU cores. - Move some dual-link display panels to the dual-link schema - Drop mux controller node name constraints - Remove Baikal SoC bus bindings - Fix a false warning in the thermal trip node binding" * tag 'devicetree-for-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (39 commits) dt-bindings: display: panel: panel-simple: Add lg,sw49410 compatible dt-bindings: display: ti, am65x-dss: Fix AM62L DSS reg and clock constraints dt-bindings: display: simple: Move Innolux G156HCE-L01 panel to dual-link dt-bindings: display: simple: Move AUO 21.5" FHD to dual-link dt-bindings: thermal: Fix false warning with 'phandle' in trips nodes of: unittest: fix use-after-free in testdrv_probe() of: unittest: fix use-after-free in of_unittest_changeset() dt-bindings: qcom,pdc: document the Hawi Power Domain Controller dt-bindings: ARM: arm,vexpress-scc: convert to DT schema drivers/of: fdt: validate flat DT string properties before string use drivers/of: fdt: validate stdout-path properties before parsing them dt-bindings: sram: Document qcom,hawi-imem compatible dt-bindings: sram: Allow multiple-word prefixes to sram subnode dt-bindings: sram: Document qcom,milos-imem scripts/dtc: Update to upstream version v1.7.2-69-g53373d135579 of: property: Allow fw_devlink device-tree on x86 dt-bindings: arm: cpus: Add Apple M3 CPU core compatibles dt-bindings: display: lt8912b: Drop redundant endpoint properties dt-bindings: opp-v2: Fix example 3 CPU reg value dt-bindings: connector: add pd-disable dependency ...

dt-bindings: sram: Document qcom,hawi-imem compatible

2026-04-13T20:01:26+00:00

On Qualcomm Hawi platform, IMEM is a block of SRAM shared across multiple IP blocks which can fall back to "mmio-sram". Document its compatible. Reviewed-by: Konrad Dybcio Signed-off-by: Mukesh Ojha Link: https://patch.msgid.link/20260401125528.594108-1-mukesh.ojha@oss.qualcomm.com Signed-off-by: Rob Herring (Arm)

dt-bindings: sram: Allow multiple-word prefixes to sram subnode

2026-04-10T13:44:55+00:00

Currently, foo-sram is allowed, but foo-bar-sram is not. Allow it so that more complex names aren't unnecessarily simplified. Signed-off-by: Konrad Dybcio Reviewed-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20260409-topic-sram_dtbindings_misc-v2-1-59dc6b0dec45@oss.qualcomm.com Signed-off-by: Rob Herring (Arm)

dt-bindings: sram: Document qcom,milos-imem

2026-04-10T13:27:29+00:00

Add compatible for Milos SoC IMEM. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Luca Weiss Link: https://patch.msgid.link/20260410-milos-imem-v3-1-d215385fa5ab@fairphone.com Signed-off-by: Rob Herring (Arm)

dt-bindings: sram: qcom,imem: Allow modem-tables subnode

2026-03-04T01:22:14+00:00

The IP Accelerator hardware/firmware owns a sizeable region within the IMEM, named 'modem-tables', containing various packet processing configuration data. It's not actually accessed by the OS, although we have to IOMMU-map it with the IPA device, so that presumably the firmware can act upon it. Allow it as a subnode of IMEM. Reviewed-by: Krzysztof Kozlowski Reviewed-by: Alex Elder Signed-off-by: Konrad Dybcio Link: https://patch.msgid.link/20260302-topic-ipa_imem-v6-1-c0ebbf3eae9f@oss.qualcomm.com Signed-off-by: Jakub Kicinski