<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/Documentation/devicetree/bindings/mtd, branch v6.18.22</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.18.22</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v6.18.22'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2025-09-29T15:54:33+00:00</updated>
<entry>
<title>dt-bindings: mtd: Add realtek,rtl9301-ecc</title>
<updated>2025-09-29T15:54:33+00:00</updated>
<author>
<name>Markus Stockhausen</name>
<email>markus.stockhausen@gmx.de</email>
</author>
<published>2025-09-19T07:52:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=12bfcb84dc0852c97baff9ac1c0292a9db90c367'/>
<id>urn:sha1:12bfcb84dc0852c97baff9ac1c0292a9db90c367</id>
<content type='text'>
Add a dtschema for the ECC engine on the Realtek RTL93xx SoCs.
The engine supports BCH6 and BCH12 parity for 512 byte blocks.

The hardware can make use of interrupts but this is not yet
supported by the driver. From the known datasheets it is
connected to the LXB (lexra bus) and propably depends on its
clock. Provide an optional clock property that can describe
the relation.

Signed-off-by: Markus Stockhausen &lt;markus.stockhausen@gmx.de&gt;
Reviewed-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: mtd: loongson,ls1b-nand-controller: Document the Loongson-2K1000 NAND controller</title>
<updated>2025-09-10T08:56:09+00:00</updated>
<author>
<name>Binbin Zhou</name>
<email>zhoubinbin@loongson.cn</email>
</author>
<published>2025-09-04T13:07:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=0b1ae6480c3be58ad31afe757cbf1069ae072bb1'/>
<id>urn:sha1:0b1ae6480c3be58ad31afe757cbf1069ae072bb1</id>
<content type='text'>
Add new compatible for the Loongson-2K NAND controller used for
Loongson-2K1000 SoC.

Reviewed-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
Signed-off-by: Binbin Zhou &lt;zhoubinbin@loongson.cn&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: mtd: loongson,ls1b-nand-controller: Document the Loongson-2K0500 NAND controller</title>
<updated>2025-09-10T08:56:09+00:00</updated>
<author>
<name>Binbin Zhou</name>
<email>zhoubinbin@loongson.cn</email>
</author>
<published>2025-09-04T13:07:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=4a2bab7ccceb14b48e86794b87104248c75aa587'/>
<id>urn:sha1:4a2bab7ccceb14b48e86794b87104248c75aa587</id>
<content type='text'>
Add new compatible for the Loongson-2K NAND controller used for
Loongson-2K0500 SoC.

Acked-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
Signed-off-by: Binbin Zhou &lt;zhoubinbin@loongson.cn&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: mtd samsung-s3c2410: Drop S3C2410 support</title>
<updated>2025-09-02T08:33:12+00:00</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@linaro.org</email>
</author>
<published>2025-08-30T17:01:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=6186e80a7440e0f9f45de6275b7f495ea11bd72c'/>
<id>urn:sha1:6186e80a7440e0f9f45de6275b7f495ea11bd72c</id>
<content type='text'>
Samsung S3C24xx family of SoCs was removed from the Linux kernel in the
commit 61b7f8920b17 ("ARM: s3c: remove all s3c24xx support"), in January
2023.  There are no in-kernel users of its compatibles.

Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Acked-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'mtd/for-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux</title>
<updated>2025-07-31T20:43:02+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2025-07-31T20:43:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=cbbf0a759ff96c80dfc32192a2cc427b79447f74'/>
<id>urn:sha1:cbbf0a759ff96c80dfc32192a2cc427b79447f74</id>
<content type='text'>
Pull mtd updates from Miquel Raynal:
 "MTD changes:

   - Apart from a binding conversion to yaml, only minor changes/small
     fixes have been merged.

  Raw NAND changes:

   - Minor fixes for various controller drivers like DMA mapping checks,
     better timing derivations or bitflip statistics.

   - some Hynix NAND flashes were not supporting read-retries, so don't
     even try to do it

  SPI NAND changes:

   - In order to support high-speed modes, certain chips need extra
     configuration like adding more dummy cycles. This is now possible,
     especially on Winbond chips.

   - Aside from that, Gigadevice gets support for a new chip (GD5F1GM9).

  SPI NOR changes:

   - A notable changes is the fix for exiting 4-byte addressing on
     Infineon SEMPER flashes. These flashes do not support the standard
     EX4B opcode (E9h), and use a vendor-specific opcode (B8h) instead.

   - There is also a fix for unlocking flashes that are write-protected
     at power-on. This was caused by using an uninitialized mtd_info in
     spi_nor_try_unlock_all()"

* tag 'mtd/for-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (26 commits)
  mtd: spinand: winbond: Add comment about the maximum frequency
  mtd: spinand: winbond: Enable high-speed modes on w35n0xjw
  mtd: spinand: winbond: Enable high-speed modes on w25n0xjw
  mtd: spinand: Add a -&gt;configure_chip() hook
  mtd: spinand: Add a frequency field to all READ_FROM_CACHE variants
  mtd: spinand: Fix macro alignment
  spi: spi-mem: Take into account the actual maximum frequency
  spi: spi-mem: Use picoseconds for calculating the op durations
  mtd: rawnand: atmel: set pmecc data setup time
  mtd: spinand: propagate spinand_wait() errors from spinand_write_page()
  mtd: rawnand: fsmc: Add missing check after DMA map
  mtd: rawnand: rockchip: Add missing check after DMA map
  mtd: rawnand: hynix: don't try read-retry on SLC NANDs
  mtd: rawnand: atmel: Fix dma_mapping_error() address
  mtd: nand: brcmnand: fix mtd corrected bits stat
  mtd: rawnand: renesas: Add missing check after DMA map
  mtd: spinand: gigadevice: Add support for GD5F1GM9 chips
  mtd: nand: brcmnand: replace manual string choices with standard helpers
  mtd: map: Don't use "proxy" headers
  mtd: spi-nor: Fix spi_nor_try_unlock_all()
  ...
</content>
</entry>
<entry>
<title>Merge tag 'spi-nor/for-6.17' into mtd/next</title>
<updated>2025-07-31T16:52:04+00:00</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2025-07-31T16:52:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=3dd8aa0ef78e4941f4b915d317616c03d08e31b2'/>
<id>urn:sha1:3dd8aa0ef78e4941f4b915d317616c03d08e31b2</id>
<content type='text'>
SPI NOR changes for 6.17

Notable changes:

- Fix exiting 4-byte addressing on Infineon SEMPER flashes. These
  flashes do not support the standard EX4B opcode (E9h), and use a
  vendor-specific opcode (B8h) instead.

- Fix unlocking of flashes that are write-protected at power-on. This
  was caused by using an uninitialized mtd_info in
  spi_nor_try_unlock_all().

Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: Correct indentation and style in DTS example</title>
<updated>2025-07-29T00:56:29+00:00</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@linaro.org</email>
</author>
<published>2025-07-25T10:02:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=0121898ec05fa4c1f566fc05c7e8b3caf0998f97'/>
<id>urn:sha1:0121898ec05fa4c1f566fc05c7e8b3caf0998f97</id>
<content type='text'>
DTS example in the bindings should be indented with 2- or 4-spaces and
aligned with opening '- |', so correct any differences like 3-spaces or
mixtures 2- and 4-spaces in one binding.

No functional changes here, but saves some comments during reviews of
new patches built on existing code.

Acked-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt; # For MMC
Acked-by: Lee Jones &lt;lee@kernel.org&gt;
Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;
Reviewed-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt; # renesas
Link: https://lore.kernel.org/r/20250107131456.247610-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Link: https://lore.kernel.org/r/20250725100241.120106-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: mtd: jedec,spi-nor: Add atmel,at26* compatible string</title>
<updated>2025-07-03T15:02:45+00:00</updated>
<author>
<name>Frank Li</name>
<email>Frank.Li@nxp.com</email>
</author>
<published>2025-05-23T15:52:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=12da2e6ccd8a4ce47e9ae395c7edd327d73ab475'/>
<id>urn:sha1:12da2e6ccd8a4ce47e9ae395c7edd327d73ab475</id>
<content type='text'>
Add atmel,at26* compatible string to fix below CHECK_DTB warning:

arch/arm/boot/dts/nxp/vf/vf610-twr.dtb: /soc/bus@40000000/spi@4002c000/at26df081a@0:
    failed to match any schema with compatible: ['atmel,at26df081a']

Signed-off-by: Frank Li &lt;Frank.Li@nxp.com&gt;
Acked-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Acked-by: Pratyush Yadav &lt;pratyush@kernel.org&gt;
Signed-off-by: Pratyush Yadav &lt;pratyush@kernel.org&gt;
Link: https://lore.kernel.org/r/20250523155258.546003-1-Frank.Li@nxp.com
</content>
</entry>
<entry>
<title>dt-bindings: mtd: convert nxp-spifi.txt to yaml format</title>
<updated>2025-06-18T09:16:05+00:00</updated>
<author>
<name>Frank Li</name>
<email>Frank.Li@nxp.com</email>
</author>
<published>2025-06-02T14:09:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=27b045eb3e30ce9a436b8ee5bcb4869f7e3522a6'/>
<id>urn:sha1:27b045eb3e30ce9a436b8ee5bcb4869f7e3522a6</id>
<content type='text'>
Convert nxp-spifi.txt to yaml format.

Additional changes:
- ref /schemas/spi/spi-controller.yaml.
- remove label in example.
- change node name to spi in example.
- remove child node in example.

Signed-off-by: Frank Li &lt;Frank.Li@nxp.com&gt;
Reviewed-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'nand/for-6.16' into mtd/next</title>
<updated>2025-06-02T16:39:50+00:00</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2025-06-02T16:39:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=aa702923258f2ce5e259b9cb8e746090bb6bf126'/>
<id>urn:sha1:aa702923258f2ce5e259b9cb8e746090bb6bf126</id>
<content type='text'>
The SPI NAND subsystem has seen the introduction of DTR operations (the
equivalent of DDR transfers), which involved quite a few preparation
patches for clarifying macro names.

In the raw NAND subsystem, the brcmnand driver has been "fixed" for old
legacy SoCs with an update of the -&gt;exec_op() hook, there has been the
introduction of a new controller driver named Loongson-1, and the
Qualcomm driver has received quite a few misc fixes as well as a new
compatible.

Aside from this, there is the usual load of misc improvement and fixes.
</content>
</entry>
</feed>
