<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/Documentation/devicetree/bindings/memory-controllers, branch v7.2-rc1</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v7.2-rc1</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v7.2-rc1'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2026-06-17T18:54:57+00:00</updated>
<entry>
<title>Merge tag 'devicetree-for-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux</title>
<updated>2026-06-17T18:54:57+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2026-06-17T18:54:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=09fb6892f34abdb6d9b50ae7337b7b7b56dc82d6'/>
<id>urn:sha1:09fb6892f34abdb6d9b50ae7337b7b7b56dc82d6</id>
<content type='text'>
Pull devicetree updates from Rob Herring:
 "DT core:

   - Add support for handling multiple cells in "iommu-map" entries

   - Support only 1 entry in /reserved-memory "reg" entries. Support for
     more than 1 entry has been broken

   - Fix a UAF on alloc_reserved_mem_array() failure

   - Make "ibm,phandle" handling logic specific to PPC

   - Use memcpy() instead of strcpy() for known length strings

   - Ensure __of_find_n_match_cpu_property() handles malformed "reg"
     entries

   - Add various checks that expected strings are strings before
     accessing them

   - Drop redundant memset() when unflattening DT

  DT bindings:

   - Add a DTS style checker. Currently hooked up to dt_binding_check to
     check examples

   - Convert st,nomadik platform, ti,omap-dmm, and ti,irq-crossbar
     bindings to DT schema

   - Add Apple System Management Controller hwmon, Qualcomm Hamoa
     Embedded Controller, Qualcomm IPQ6018 PWM controller, fsl,mc1323,
     Samsung SOFEF01-M DDIC panel, Freescale i.MX53 Television Encoder,
     Samsung S2M series PMIC extcon, and MT6365 PMIC AuxADC schemas

   - Extend bindings for QCom Maili and Nord PDC, QCom Hali fastrpc,
     qcom,eliza-imem, qcom,oryon-1-5 CPU, and MT6365 Keys

   - Consolidate "sram" property definitions

   - Fix constraints on "nvmem" properties which only contain phandles
     and no arg cells

   - Another pass of fixing "phandle-array" constraints

   - Add Gira vendor prefix"

* tag 'devicetree-for-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (50 commits)
  dt-bindings: interrupt-controller: qcom,pdc: Add Maili compatible string
  dt-bindings: interrupt-controller: ti,irq-crossbar: Convert to DT schema
  dt-bindings: vendor-prefixes: add Gira
  dt-bindings: embedded-controller: Add Qualcomm reference device EC description
  dt-bindings: pwm: add IPQ6018 binding
  dt-bindings: hwmon: Add Apple System Management Controller hwmon schema
  docs: dt: writing-schema: Clarify what is required in a schema
  of: Respect #{iommu,msi}-cells in maps
  of: Factor arguments passed to of_map_id() into a struct
  of: Add convenience wrappers for of_map_id()
  of: reserved_mem: zero total_reserved_mem_cnt if no valid /reserved-memory entry
  of: reserved_mem: handle NULL name in of_reserved_mem_lookup()
  dt-bindings: cache: l2c2x0: Add missing power-domains
  dt-bindings: interrupt-controller: renesas,r9a09g077-icu: Fix reg size in example
  dt-bindings: nvmem: consumer: Make 'nvmem' an array of one-item entries
  drivers/of/overlay: Use memcpy() to copy known length strings
  dt-bindings: add self-test fixtures for style checker
  dt-bindings: wire style checker into dt_binding_check
  scripts/jobserver-exec: propagate child exit status
  dt-bindings: add DTS style checker
  ...
</content>
</entry>
<entry>
<title>dt-bindings: memory: renesas,rzg3e-xspi: Add RZ/T2H and RZ/N2H support</title>
<updated>2026-05-24T19:05:15+00:00</updated>
<author>
<name>Lad Prabhakar</name>
<email>prabhakar.mahadev-lad.rj@bp.renesas.com</email>
</author>
<published>2026-05-15T11:52:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=a6954060adc9d956a99f909f46bf9fb0348c4fa2'/>
<id>urn:sha1:a6954060adc9d956a99f909f46bf9fb0348c4fa2</id>
<content type='text'>
Document xSPI controller found on the Renesas RZ/T2H and RZ/N2H SoCs.
The xSPI IP on these SoCs is identical to that found on the RZ/G3E SoC.

The RZ/G3E HW manual (Rev.1.15) references bridge channel 1 and its
bits, however the hardware actually supports only a single bridge
channel (channel 0), matching the RZ/T2H design. The references to
channel 1 and its configuration bits will be corrected in a future
revision of the HW manual.

Update clock/reset constraints to handle the SoC differences.

Signed-off-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@oss.qualcomm.com&gt;
Link: https://patch.msgid.link/20260515115202.1515577-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Krzysztof Kozlowski &lt;krzk@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: drop tab characters from DTS examples</title>
<updated>2026-05-05T15:54:45+00:00</updated>
<author>
<name>Daniel Golle</name>
<email>daniel@makrotopia.org</email>
</author>
<published>2026-04-29T03:48:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=0f2280c8e89423fc2e762725536f8388d3e3029d'/>
<id>urn:sha1:0f2280c8e89423fc2e762725536f8388d3e3029d</id>
<content type='text'>
YAML literal block scalars cannot use tabs for indent.
Replace tab separators (mostly between values and trailing /* ... */
comments) with single spaces.

Signed-off-by: Daniel Golle &lt;daniel@makrotopia.org&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@oss.qualcomm.com&gt;
Link: https://patch.msgid.link/2044ee0cac191c7be8b6e989fc3c99b24aa4cc5e.1777434096.git.daniel@makrotopia.org
Signed-off-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge branch 'for-v7.2/tegra114-mc-bindings' into mem-ctrl-next</title>
<updated>2026-05-04T18:46:50+00:00</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzk@kernel.org</email>
</author>
<published>2026-05-04T18:46:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=b42834da6f2ac9166974f7bca020c3d4a76e7b6a'/>
<id>urn:sha1:b42834da6f2ac9166974f7bca020c3d4a76e7b6a</id>
<content type='text'>
</content>
</entry>
<entry>
<title>dt-bindings: memory: Document Tegra114 External Memory Controller</title>
<updated>2026-05-04T18:45:47+00:00</updated>
<author>
<name>Svyatoslav Ryhel</name>
<email>clamor95@gmail.com</email>
</author>
<published>2026-04-27T07:03:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=a4f97f9467661602bd6bf614bcee884502794d43'/>
<id>urn:sha1:a4f97f9467661602bd6bf614bcee884502794d43</id>
<content type='text'>
Include Tegra114 support into existing Tegra124 EMC schema with the most
notable difference being the amount of EMC timings and a few SoC unique
entries.

Signed-off-by: Svyatoslav Ryhel &lt;clamor95@gmail.com&gt;
Reviewed-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
Link: https://patch.msgid.link/20260427070312.81679-4-clamor95@gmail.com
Signed-off-by: Krzysztof Kozlowski &lt;krzk@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: memory: Document Tegra114 Memory Controller</title>
<updated>2026-05-04T18:45:46+00:00</updated>
<author>
<name>Svyatoslav Ryhel</name>
<email>clamor95@gmail.com</email>
</author>
<published>2026-04-27T07:03:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=b0822a883408f32d494ce9cdc26f4266774cf3f1'/>
<id>urn:sha1:b0822a883408f32d494ce9cdc26f4266774cf3f1</id>
<content type='text'>
Add Tegra114 support into existing Tegra124 MC schema with the most
notable difference in the amount of EMEM timings.

Each memory client has unique hardware ID, add these IDs.

Signed-off-by: Svyatoslav Ryhel &lt;clamor95@gmail.com&gt;
Reviewed-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
Link: https://patch.msgid.link/20260427070312.81679-2-clamor95@gmail.com
Signed-off-by: Krzysztof Kozlowski &lt;krzk@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: memory: tegra: Add nvidia,tegra238-mc compatible</title>
<updated>2026-05-04T17:26:49+00:00</updated>
<author>
<name>Ashish Mhetre</name>
<email>amhetre@nvidia.com</email>
</author>
<published>2026-04-27T07:34:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=bf7cf25d4245fe49c71eba0e3b09b6260a336999'/>
<id>urn:sha1:bf7cf25d4245fe49c71eba0e3b09b6260a336999</id>
<content type='text'>
Document the device tree binding for the Tegra238 memory controller.
Tegra238 has 8 memory controller channels plus broadcast and stream-id
registers.

Add the stream ID header (nvidia,tegra238-mc.h) defining ISO and NISO
stream IDs for SMMU configuration.

Signed-off-by: Ashish Mhetre &lt;amhetre@nvidia.com&gt;
Reviewed-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Link: https://patch.msgid.link/20260427073419.567360-2-amhetre@nvidia.com
Signed-off-by: Krzysztof Kozlowski &lt;krzk@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: memory: tegra210: Mark EMC as cooling device</title>
<updated>2026-03-27T15:25:44+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2026-02-23T14:33:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=ffff5e7275516f274fac53ab5496f26481b4b1b9'/>
<id>urn:sha1:ffff5e7275516f274fac53ab5496f26481b4b1b9</id>
<content type='text'>
The external memory controller found on Tegra210 can use throttling of
the EMC frequency in order to reduce the memory chip temperature. Mark
the memory controller as a cooling device to take advantage of this
functionality.

Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: memory: Add Tegra210 memory controller bindings</title>
<updated>2026-03-27T15:25:44+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2026-02-23T14:33:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=834e6bd48dd440b292d741138a7a87118ae9d95a'/>
<id>urn:sha1:834e6bd48dd440b292d741138a7a87118ae9d95a</id>
<content type='text'>
Document the bindings for the memory controller found on Tegra210 SoCs.

Reviewed-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'soc-dt-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc</title>
<updated>2026-02-11T05:11:08+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2026-02-11T05:11:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=6589b3d76db2d6adbf8f2084c303fb24252a0dc6'/>
<id>urn:sha1:6589b3d76db2d6adbf8f2084c303fb24252a0dc6</id>
<content type='text'>
Pull SoC devicetree updates from Arnd Bergmann:
 "There are a handful of new SoCs this time, all of these are more or
  less related to chips in a wider family:

   - SpacemiT Key Stone K3 is an 8-core risc-v chip, and the first
     widely available RVA23 implementation. Note that this is entirely
     unrelated with the similarly named Texas Instruments K3 chip family
     that follwed the TI Keystone2 SoC.

   - The Realtek Kent family of SoCs contains three chip models
     rtd1501s, rtd1861b and rtd1920s, and is related to their earlier
     Set-top-box and NAS products such as rtd1619, but is built on newer
     Arm Cortex-A78 cores.

   - The Qualcomm Milos family includes the Snapdragon 7s Gen 3 (SM7635)
     mobile phone SoC built around Armv9 Kryo cores of the Arm
     Cortex-A720 generation. This one is used in the Fairphone Gen 6

   - Qualcomm Kaanapali is a new SoC based around eight high performance
     Oryon CPU cores

   - NXP i.MX8QP and i.MX952 are both feature reduced versions of chips
     we already support, i.e. the i.MX8QM and i.MX952, with fewer CPU
     cores and I/O interfaces.

  As part of a cleanup, a number of SoC specific devicetree files got
  removed because they did not have a single board using the .dtsi files
  and they were never compile tested as a result: Samsung s3c6400, ST
  spear320s, ST stm32mp21xc/stm32mp23xc/stm32mp25xc, Renesas
  r8a779m0/r8a779m2/r8a779m4/r8a779m6/r8a779m7/r8a779m8/r8a779mb/
  r9a07g044c1/r9a07g044l1/r9a07g054l1/r9a09g047e37, and TI
  am3703/am3715. All of these could be restored easily if a new board
  gets merged.

  Broadcom/Cavium/Marvell ThunderX2 gets removed along with its only
  machine, as all remaining users are assumed to be using ACPI based
  firmware.

  A relatively small number of 43 boards get added this time, and almost
  all of them for arm64. Aside from the reference boards for the newly
  added SoCs, this includes:

   - Three server boards use 32-bit ASpeed BMCs

   - One more reference board for 32-bit Microchip LAN9668

   - 64-bit Arm single-board computers based on Amlogic s905y4, CIX
     sky1, NXP ls1028a/imx8mn/imx8mp/imx91/imx93/imx95, Qualcomm
     qcs6490/qrb2210 and Rockchip rk3568/rk3588s

   - Carrier board for SOMs using Intel agilex5, Marvell Armada 7020,
     NXP iMX8QP, Mediatek mt8370/mt8390 and rockchip rk3588

   - Two mobile phones using Snapdragon 845

   - A gaming device and a NAS box, both based on Rockchips rk356x

  On top of the newly added boards and SoCs, there is a lot of
  background activity going into cleanups, in particular towards getting
  a warning-free dtc build, and the usual work on adding support for
  more hardware on the previously added machines"

* tag 'soc-dt-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (757 commits)
  dt-bindings: intel: Add Agilex eMMC support
  arm64: dts: socfpga: agilex: add emmc support
  arm64: dts: intel: agilex5: Add simple-bus node on top of dma controller node
  ARM: dts: socfpga: fix dtbs_check warning for fpga-region
  ARM: dts: socfpga: add #address-cells and #size-cells for sram node
  dt-bindings: altera: document syscon as fallback for sys-mgr
  arm64: dts: altera: Use lowercase hex
  dt-bindings: arm: altera: combine Intel's SoCFPGA into altera.yaml
  arm64: dts: socfpga: agilex5: Add IOMMUS property for ethernet nodes
  arm64: dts: socfpga: agilex5: add support for modular board
  dt-bindings: intel: Add Agilex5 SoCFPGA modular board
  arm64: dts: socfpga: agilex5: Add dma-coherent property
  arm64: dts: realtek: Add Kent SoC and EVB device trees
  dt-bindings: arm: realtek: Add Kent Soc family compatibles
  ARM: dts: samsung: Drop s3c6400.dtsi
  ARM: dts: nuvoton: Minor whitespace cleanup
  MAINTAINERS: Add Falcon DB
  arm64: dts: a7k: add COM Express boards
  ARM: dts: microchip: Drop usb_a9g20-dab-mmx.dtsi
  arm64: dts: rockchip: Fix rk3588 PCIe range mappings
  ...
</content>
</entry>
</feed>
