kernel/linux.git/Documentation/devicetree/bindings/memory-controllers, branch v6.12.80

dt-bindings: memory-controllers: renesas,rpc-if: add top-level constraints

2024-08-21T11:22:06+00:00

Properties with variable number of items per each device are expected to have widest constraints in top-level "properties:" block and further customized (narrowed) in "if:then:". Add missing top-level constraints for clocks. Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20240818172930.121898-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski

dt-bindings: memory-controllers: fsl,imx-weim: Fix "fsl,weim-cs-timing" schema

2024-08-08T09:49:37+00:00

The "fsl,weim-cs-timing" property is an array, but the constraints in the if/then schema are for a matrix. That worked fine when all properties were decoded into a matrix, but now dtschema decodes properties into scalars and arrays based on their type. Signed-off-by: Rob Herring (Arm) Acked-by: Peng Fan Link: https://lore.kernel.org/r/20240807225959.3343093-1-robh@kernel.org Signed-off-by: Krzysztof Kozlowski

Merge tag 'devicetree-for-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

2024-07-18T01:07:31+00:00

Pull devicetree updates from Rob Herring: "DT Bindings: - Convert and add a bunch of IBM FSI related bindings - Add a new schema listing legacy compatibles which will (probably) never be documented. This will silence various checks warning about them. - Add bindings for Sierra Wireless mangOH Green SPI IoT interface, new Arm 2024 Cortex and Neoverse CPUs, QCom sc8180x PDC, QCom SDX75 GPI DMA, imx8mp/imx8qxp fsl,irqsteer, and Renesas RZ/G2UL CRU and CSI-2 blocks - Convert Spreadtrum sprd-timer, FSL cpm_qe, FSL fsl,ls-scfg-msi, FSL q(b)man-*, FSL qoriq-mc, and img,pdc-wdt bindings to DT schema - Drop obsolete stericsson,abx500.txt DT core: - Update dtc to upstream version v1.7.0-93-g1df7b047fe43 - Add support to run DT validation on DTs with applied overlays - Add helper for creating boolean properties in dynamic nodes and use that for dynamic PCI nodes - Clean-up early parsing of '#{address,size}-cells'" * tag 'devicetree-for-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (39 commits) dt-bindings: timer: sprd-timer: convert to YAML dt-bindings: incomplete-devices: document devices without bindings dt-bindings: trivial-devices: document the Sierra Wireless mangOH Green SPI IoT interface scripts/dtc: Update to upstream version v1.7.0-93-g1df7b047fe43 dt-bindings: soc: fsl: Add fsl,ls1028a-reset for reset syscon node dt-bindings: soc: fsl: cpm_qe: convert to yaml format dt-bindings: i2c: i2c-fsi: Convert to json-schema dt-bindings: fsi: Document the FSI Hub Controller dt-bindings: fsi: Document the AST2700 FSI controller dt-bindings: fsi: ast2600-fsi-master: Convert to json-schema dt-bindings: fsi: ibm,i2cr-fsi-master: Reference common FSI controller dt-bindings: fsi: Document the FSI controller common properties dt-bindings: fsi: Document the IBM SBEFIFO engine dt-bindings: fsi: p9-occ: Convert to json-schema dt-bindings: fsi: Document the IBM SCOM engine dt-bindings: fsi: fsi2spi: Document SPI controller child nodes dt-bindings: interrupt-controller: convert fsl,ls-scfg-msi to yaml dt-bindings: soc: fsl: Convert q(b)man-* to yaml format dt-bindings: misc: fsl,qoriq-mc: convert to yaml format dt-bindings: drop stale Anson Huang from maintainers ...

dt-bindings: drop stale Anson Huang from maintainers

2024-07-09T13:40:17+00:00

Emails to Anson Huang bounce: Diagnostic-Code: smtp; 550 5.4.1 Recipient address rejected: Access denied. Add IMX platform maintainers for bindings which would become orphaned. Acked-by: Uwe Kleine-König Reviewed-by: Fabio Estevam Acked-by: Peng Fan Acked-by: Wolfram Sang # for I2C Signed-off-by: Krzysztof Kozlowski Acked-by: Mark Brown Acked-by: Jonathan Cameron # for IIO Acked-by: Andi Shyti Acked-by: Abel Vesa Link: https://lore.kernel.org/r/20240617065828.9531-1-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring (Arm)

dt-bindings: memory: fsl: replace maintainer

2024-06-17T06:07:35+00:00

Li Yang's mail address is bouncing, replace it with Shawn Guo's one. Signed-off-by: Michael Walle Link: https://lore.kernel.org/r/20240604142249.1957762-2-mwalle@kernel.org Signed-off-by: Krzysztof Kozlowski

Merge tag 'memory-controller-drv-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into soc/drivers

2024-04-29T20:26:41+00:00

Memory controller drivers for v6.10 Few cleanups: 1. Correct module auto-loading - missing aliases in the module. 2. Document bindings for the Samsung S5Pv210 SoC DMC memory controller. * tag 'memory-controller-drv-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: memory: mtk-smi: fix module autoloading memory: brcmstb_memc: fix module autoloading dt-bindings: memory-controllers: add Samsung S5Pv210 SoC DMC Link: https://lore.kernel.org/r/20240428162001.28011-1-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann

dt-bindings: treewide: add access-controllers description

2024-04-05T12:39:10+00:00

access-controllers is an optional property that allows a peripheral to refer to one or more domain access controller(s). Description of this property is added to all peripheral binding files of the peripheral under the STM32 firewall controller. It allows an accurate representation of the hardware, where various peripherals are connected to a firewall bus. The firewall can then check the peripheral accesses before allowing its device to probe. Signed-off-by: Gatien Chevallier Reviewed-by: Rob Herring Signed-off-by: Alexandre Torgue

dt-bindings: memory-controllers: add Samsung S5Pv210 SoC DMC

2024-03-25T18:02:02+00:00

Document bindings for the S5Pv210 SoC DMC memory controller, already used in DTS and Linux CPU frequency scaling driver. The binding looks quite empty and is most likely incomplete, but the platform is so old that no one expects any effort on this, except documenting what is in DTS. Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20240312190348.724361-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski

dt-bindings: memory-controller: st,stm32: add MP25 support

2024-02-27T09:18:02+00:00

Add a new compatible string to support MP25 SoC. On MP1 SoC, RNB signal (NAND controller signal) and NWAIT signal (PSRAM controller signal) have been integrated together in the SoC. That means that the NAND controller and the PSRAM controller (if the signal is used) can not be used at the same time. On MP25 SoC, the 2 signals can be used outside the SoC, so there is no more restrictions. MP1 SoC also embeds revision 1.1 of the FMC2 IP when MP25 SoC embeds revision 2.0 of the FMC2 IP. MP25 SoC is also using PSCI OS-initiated mode, so allow a single 'power-domains' entry for STM32 FMC2. As MP1 will move on PSCI OS-initiated mode, add this property as optional for all FMC2 variants. Signed-off-by: Christophe Kerello Link: https://lore.kernel.org/r/20240226101428.37791-2-christophe.kerello@foss.st.com Signed-off-by: Krzysztof Kozlowski

dt-bindings: bus: imx-weim: convert to YAML

2024-02-26T07:25:59+00:00

Convert the i.MX Wireless External Interface Module binding to YAML. Signed-off-by: Sebastian Reichel Link: https://lore.kernel.org/r/20240224213240.1854709-3-sre@kernel.org Reviewed-by: Krzysztof Kozlowski Signed-off-by: Krzysztof Kozlowski