kernel/linux.git/Documentation/devicetree/bindings/gpu, branch v6.19.11

dt-bindings: gpu: img,powervr-rogue: Document GE7800 GPU in Renesas R-Car V3U

2025-12-16T13:59:35+00:00

Document Imagination Technologies PowerVR Rogue GE7800 BNVC 15.5.1.64 present in Renesas R-Car R8A779A0 V3U SoC. Signed-off-by: Niklas Söderlund Reviewed-by: Marek Vasut Reviewed-by: Matt Coster Reviewed-by: Geert Uytterhoeven Acked-by: Conor Dooley Link: https://patch.msgid.link/20251106212342.2771579-2-niklas.soderlund+renesas@ragnatech.se Signed-off-by: Rob Herring (Arm)

Merge tag 'devicetree-for-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

2025-12-04T23:50:37+00:00

Pull devicetree updates from Rob Herring: "DT bindings: - Convert lattice,ice40-fpga-mgr, apm,xgene-storm-dma, brcm,sr-thermal, amazon,al-thermal, brcm,ocotp, mt8173-mdp, Actions Owl SPS, Marvell AP80x System Controller, Marvell CP110 System Controller, cznic,moxtet, and apm,xgene-slimpro-mbox to DT schema format - Add i.MX95 fsl,irqsteer, MT8365 Mali Bifrost GPU, Anvo ANV32C81W EEPROM, and Microchip pic64gx PLIC - Add missing LGE, AMD Seattle, and APM X-Gene SoC platform compatibles - Updates to brcm,bcm2836-l1-intc, brcm,bcm2835-hvs, and bcm2711-hdmi bindings to fix warnings on BCM2712 platforms - Drop obsolete db8500-thermal.txt - Treewide clean-up of extra blank lines and inconsistent quoting - Ensure all .dtbo targets are applied to a base .dtb - Speed up dt_binding_check by skipping running validation on empty examples DT core: - Add of_machine_device_match() and of_machine_get_match_data() helpers and convert users treewide - Fix bounds checking of address properties in FDT code. Rework the code to have a single implementation of the bounds checks. - Rework of_irq_init() to ignore any implicit interrupt-parent (i.e. in a parent node) on nodes without an interrupt. This matches the spec description and fixes some RISC-V platforms. - Avoid a spurious message on overlay removal - Skip DT kunit tests on RISCV+ACPI" * tag 'devicetree-for-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (55 commits) dt-bindings: kbuild: Skip validating empty examples dt-bindings: interrupt-controller: brcm,bcm2836-l1-intc: Drop interrupt-controller requirement dt-bindings: display: Fix brcm,bcm2835-hvs bindings for BCM2712 dt-bindings: display: bcm2711-hdmi: Add interrupt details for BCM2712 of: Skip devicetree kunit tests when RISCV+ACPI doesn't populate root node soc: tegra: Simplify with of_machine_device_match() soc: qcom: ubwc: Simplify with of_machine_get_match_data() powercap: dtpm: Simplify with of_machine_get_match_data() platform: surface: Simplify with of_machine_get_match_data() irqchip/atmel-aic: Simplify with of_machine_get_match_data() firmware: qcom: scm: Simplify with of_machine_device_match() cpuidle: big_little: Simplify with of_machine_device_match() cpufreq: sun50i: Simplify with of_machine_device_match() cpufreq: mediatek: Simplify with of_machine_get_match_data() cpufreq: dt-platdev: Simplify with of_machine_get_match_data() of: Add wrappers to match root node with OF device ID tables dt-bindings: eeprom: at25: Add Anvo ANV32C81W of/reserved_mem: Simplify the logic of __reserved_mem_alloc_size() of/reserved_mem: Simplify the logic of fdt_scan_reserved_mem_reg_nodes() of/reserved_mem: Simplify the logic of __reserved_mem_reserve_reg() ...

dt-bindings: gpu: mali-bifrost: Add compatible for MT8365 SoC

2025-11-17T17:24:50+00:00

Add a compatible for the MediaTek MT8365 SoC, that has an integrated ARM Mali G52 MC1 GPU and compatible with arm,mali-bifrost. Reviewed-by: AngeloGioacchino Del Regno Acked-by: Conor Dooley Signed-off-by: Louis-Alexis Eyraud Link: https://patch.msgid.link/20251021-mt8365-enable-gpu-v2-1-17e05cff2c86@collabora.com Signed-off-by: Rob Herring (Arm)

dt-bindings: gpu: img,powervr-rogue: Document GE7800 GPU in Renesas R-Car M3-N

2025-11-05T10:54:39+00:00

Document Imagination Technologies PowerVR Rogue GE7800 BNVC 15.5.1.64 present in Renesas R-Car R8A77965 M3-N SoC. Reviewed-by: Geert Uytterhoeven Reviewed-by: Krzysztof Kozlowski Signed-off-by: Marek Vasut Reviewed-by: Matt Coster Link: https://patch.msgid.link/20251104135716.12497-2-marek.vasut+renesas@mailbox.org Signed-off-by: Matt Coster

dt-bindings: gpu: img,powervr-rogue: Keep lists sorted alphabetically

2025-11-05T10:54:39+00:00

Sort the enum: list alphabetically. No functional change. Signed-off-by: Marek Vasut Reviewed-by: Krzysztof Kozlowski Reviewed-by: Matt Coster Link: https://patch.msgid.link/20251104135716.12497-1-marek.vasut+renesas@mailbox.org Signed-off-by: Matt Coster

dt-bindings: gpu: mali-valhall-csf: add mediatek,mt8196-mali variant

2025-11-03T15:26:54+00:00

The Mali-based GPU on the MediaTek MT8196 SoC uses a separate MCU to control the power and frequency of the GPU. This is modelled as a power domain and clock provider. It lets us omit the OPP tables from the device tree, as those can now be enumerated at runtime from the MCU. Add the necessary schema logic to handle what this SoC expects in terms of clocks and power-domains. Reviewed-by: Rob Herring (Arm) Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Liviu Dudau Signed-off-by: Nicolas Frattaroli Link: https://patch.msgid.link/20251017-mt8196-gpufreq-v8-1-98fc1cc566a1@collabora.com Signed-off-by: Liviu Dudau

dt-bindings: gpu: mali-valhall-csf: Document i.MX95 support

2025-11-03T14:25:22+00:00

The instance of the GPU populated in Freescale i.MX95 is the Mali G310, document support for this variant. Reviewed-by: Alexander Stein Reviewed-by: Frank Li Reviewed-by: Rob Herring (Arm) Signed-off-by: Marek Vasut Link: https://patch.msgid.link/20251102160927.45157-1-marek.vasut@mailbox.org Signed-off-by: Liviu Dudau

dt-bindings: gpu: img,powervr-rogue: Drop duplicate newline

2025-10-31T14:31:13+00:00

Fix the following DT schema check warning: ./Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml:103:1: [warning] too many blank lines (2 > 1) (empty-lines) One newline is enough. No functional change. Signed-off-by: Marek Vasut Reviewed-by: Matt Coster Acked-by: Rob Herring (Arm) Link: https://patch.msgid.link/20251029194210.129326-1-marek.vasut+renesas@mailbox.org Signed-off-by: Matt Coster

dt-bindings: gpu: img,powervr-rogue: Document GX6250 GPU in Renesas R-Car M3-W/M3-W+

2025-10-27T14:44:30+00:00

Document Imagination Technologies PowerVR Rogue GX6250 BNVC 4.45.2.58 present in Renesas R-Car R8A77960 M3-W and R8A77961 M3-W+ SoC. Acked-by: Conor Dooley Signed-off-by: Marek Vasut Reviewed-by: Geert Uytterhoeven Reviewed-by: Matt Coster Link: https://patch.msgid.link/20251022033847.471106-1-marek.vasut+renesas@mailbox.org Signed-off-by: Matt Coster

dt-bindings: gpu: img,powervr-rogue: Rework the allOf section

2025-10-21T13:22:20+00:00

Rework the current allOf: section such that all handling of clocks/clock-names properties happens first, and all handling of power-domains/power-domain-names happens second. This allows the allOf section to limit various GPU models to matching clocks count in the first half, and apply the same for power-domains count in the second half, without conflating the two limits together. This makes addition of GPU models with different clocks and power-domains count easier. No functional change intended. Signed-off-by: Marek Vasut Acked-by: Conor Dooley Reviewed-by: Matt Coster Link: https://lore.kernel.org/r/20251018130147.12831-2-marek.vasut+renesas@mailbox.org Signed-off-by: Matt Coster