kernel/linux.git/Documentation/devicetree/bindings/cpu, branch v6.6.131

dt-bindings: cpu: Document NVIDIA Tegra186 CCPLEX cluster

2023-07-24T08:15:31+00:00

Add device tree bindings for the CCPLEX cluster found on NVIDIA Tegra186 SoCs. Reviewed-by: Rob Herring Signed-off-by: Thierry Reding

dt-bindings: fix dangling Documentation/arm64 reference

2023-06-21T14:53:31+00:00

The arm64 documentation has move under Documentation/arch/ fix a reference to match. Cc: Krzysztof Kozlowski Cc: Conor Dooley Cc: devicetree@vger.kernel.org Acked-by: Catalin Marinas Acked-by: Rob Herring Signed-off-by: Jonathan Corbet

dt-bindings: arm: move cpu-capacity to a shared loation

2023-02-15T03:24:05+00:00

RISC-V uses the same generic topology code as arm64 & while there currently exists no binding for cpu-capacity on RISC-V, the code paths can be hit if the property is present. Move the documentation of cpu-capacity to a shared location, ahead of defining a binding for capacity-dmips-mhz on RISC-V. Update some references to this document in the process. Signed-off-by: Conor Dooley Reviewed-by: Ley Foon Tan Acked-by: Rob Herring Reviewed-by: Yanteng Si Link: https://lore.kernel.org/r/20230104180513.1379453-2-conor@kernel.org Signed-off-by: Palmer Dabbelt

dt-bindings: drop redundant part of title (end, part two)

2022-12-16T17:41:49+00:00

The Devicetree bindings document does not have to say in the title that it is a "binding", but instead just describe the hardware. Drop trailing "Node|Tree|Generic bindings" in various forms (also with trailing full stop): find Documentation/devicetree/bindings/ -type f -name '*.yaml' \ -not -name 'trivial-devices.yaml' \ -exec sed -i -e 's/^title: $.*$ [nN]ode [bB]indings\?\.\?$/title: \1/' {} \; find Documentation/devicetree/bindings/ -type f -name '*.yaml' \ -not -name 'trivial-devices.yaml' \ -exec sed -i -e 's/^title: $.*$ [tT]ree [bB]indings\?\.\?$/title: \1/' {} \; find Documentation/devicetree/bindings/ -type f -name '*.yaml' \ -not -name 'trivial-devices.yaml' \ -exec sed -i -e 's/^title: $.*$ [gG]eneric [bB]indings\?\.\?$/title: \1/' {} \; find Documentation/devicetree/bindings/ -type f -name '*.yaml' \ -not -name 'trivial-devices.yaml' \ -exec sed -i -e 's/^title: $.*$ [bB]indings\? description\.\?$/title: \1/' {} \; find Documentation/devicetree/bindings/ -type f -name '*.yaml' \ -not -name 'trivial-devices.yaml' \ -exec sed -i -e 's/^title: $.*$ [bB]indings\? document\.\?$/title: \1/' {} \; Signed-off-by: Krzysztof Kozlowski Acked-by: Alexandre Belloni Reviewed-by: Jonathan Cameron Acked-by: Ulf Hansson # MMC Acked-by: Stephen Boyd # clk Acked-by: Vinod Koul # phy Acked-by: Mark Brown Link: https://lore.kernel.org/r/20221216163815.522628-6-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring

dt-bindings: Fix phandle-array issues in the idle-states bindings

2022-04-01T22:09:50+00:00

As per 39bd2b6a3783 ("dt-bindings: Improve phandle-array schemas"), the phandle-array bindings have been disambiguated. This fixes the new RISC-V idle-states bindings to comply with the schema. Fixes: 1bd524f7e8d8 ("dt-bindings: Add common bindings for ARM and RISC-V idle states") Reviewed-by: Rob Herring Signed-off-by: Palmer Dabbelt

Merge tag 'riscv-for-linus-5.18-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

2022-04-01T20:31:57+00:00

Pull more RISC-V updates from Palmer Dabbelt: "This has a handful of new features: - Support for CURRENT_STACK_POINTER, which enables some extra stack debugging for HARDENED_USERCOPY. - Support for the new SBI CPU idle extension, via cpuidle and suspend drivers. - Profiling has been enabled in the defconfigs. but is mostly fixes and cleanups" * tag 'riscv-for-linus-5.18-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (21 commits) RISC-V: K210 defconfigs: Drop redundant MEMBARRIER=n RISC-V: defconfig: Drop redundant SBI HVC and earlycon Documentation: riscv: remove non-existent directory from table of contents riscv: cpu.c: don't use kernel-doc markers for comments RISC-V: Enable profiling by default RISC-V: module: fix apply_r_riscv_rcv_branch_rela typo RISC-V: Declare per cpu boot data as static RISC-V: Fix a comment typo in riscv_of_parent_hartid() riscv: Increase stack size under KASAN riscv: Fix fill_callchain return value riscv: dts: canaan: Fix SPI3 bus width riscv: Rename "sp_in_global" to "current_stack_pointer" riscv module: remove (NOLOAD) RISC-V: Enable RISC-V SBI CPU Idle driver for QEMU virt machine dt-bindings: Add common bindings for ARM and RISC-V idle states cpuidle: Add RISC-V SBI CPU idle driver cpuidle: Factor-out power domain related code from PSCI domain driver RISC-V: Add SBI HSM suspend related defines RISC-V: Add arch functions for non-retentive suspend entry/exit RISC-V: Rename relocate() and make it global ...

dt-bindings: Add common bindings for ARM and RISC-V idle states

2022-03-10T17:29:56+00:00

The RISC-V CPU idle states will be described in under the /cpus/idle-states DT node in the same way as ARM CPU idle states. This patch adds common bindings documentation for both ARM and RISC-V idle states. Signed-off-by: Anup Patel Signed-off-by: Anup Patel Reviewed-by: Rob Herring Reviewed-by: Guo Ren Signed-off-by: Palmer Dabbelt

docs: fix some broken references

2019-10-10T17:25:39+00:00

There are a number of documentation files that got moved or renamed. update their references. Signed-off-by: Mauro Carvalho Chehab Acked-by: Shannon Nelson Acked-by: Guenter Roeck Acked-by: Rob Herring Acked-by: Paul Walmsley # RISC-V Acked-by: Bartosz Golaszewski Signed-off-by: Jonathan Corbet

dt-binding: cpu-topology: Move cpu-map to a common binding.

2019-07-22T16:35:57+00:00

cpu-map binding can be used to described cpu topology for both RISC-V & ARM. It makes more sense to move the binding to document to a common place. The relevant discussion can be found here. https://lkml.org/lkml/2018/11/6/19 Signed-off-by: Atish Patra Reviewed-by: Sudeep Holla Reviewed-by: Rob Herring Signed-off-by: Paul Walmsley