<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/Documentation/devicetree/bindings/clock, branch v6.19.11</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.19.11</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v6.19.11'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2025-12-16T16:17:59+00:00</updated>
<entry>
<title>dt-bindings: Updates Linus Walleij's mail address</title>
<updated>2025-12-16T16:17:59+00:00</updated>
<author>
<name>Linus Walleij</name>
<email>linusw@kernel.org</email>
</author>
<published>2025-12-16T09:52:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=54de247a0efa4c6176ba6840a58e2fb0b2130e2d'/>
<id>urn:sha1:54de247a0efa4c6176ba6840a58e2fb0b2130e2d</id>
<content type='text'>
My name is stamped into maintainership for a big slew of DT
bindings. Now that it is changing, switch it over to my
kernel.org mail address, which will hopefully be stable for the
rest of my life.

Signed-off-by: Linus Walleij &lt;linusw@kernel.org&gt;
Link: https://patch.msgid.link/20251216-maintainers-dt-v1-1-0b5ab102c9bb@kernel.org
Signed-off-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: clock: sprd,sc9860-clk: Allow "reg" for gate clocks</title>
<updated>2025-12-16T13:59:30+00:00</updated>
<author>
<name>Rob Herring (Arm)</name>
<email>robh@kernel.org</email>
</author>
<published>2025-10-29T15:56:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=512e1568562b2a19f4b175607062c8e97c9203ec'/>
<id>urn:sha1:512e1568562b2a19f4b175607062c8e97c9203ec</id>
<content type='text'>
The gate bindings have an artificial split between a "syscon" and clock
provider node. Allow "reg" properties so this split can be removed.

Reviewed-by: Chunyan Zhang &lt;zhang.lyra@gmail.com&gt;
Link: https://patch.msgid.link/20251029155615.1167903-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'pinctrl-v6.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl</title>
<updated>2025-12-08T21:45:00+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2025-12-08T21:45:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=a110f942672c8995dc1cacb5a44c6730856743aa'/>
<id>urn:sha1:a110f942672c8995dc1cacb5a44c6730856743aa</id>
<content type='text'>
Pull pin control updates from Linus Walleij:
 "The technical details below. For me the CIX Semi and Axis
  Communications ARTPEC-9 SoCs were the most interesting new drivers in
  this merge window.

  Core changes:

   - Handle per-direction skew control in the generic pin config

   - Drop the pointless subsystem boilerplate banner message during
     boot. Less noise in the console. It's available as debug message if
     someone really want it

  New drivers:

   - Samsung Exynos 8890 SoC support

   - Samsung Exynos derived Axis Communications ARTPEC-9 SoC support.
     These guys literally live next door to me, ARTPEC spells out "Axis
     Real-Time Picture Encoding Chip" and is tailored for camera image
     streams and is something they have evolved for a quarter of a
     century

   - Mediatek MT6878 SoC support

   - Qualcomm Glymur PMIC support (mostly just compatible strings)

   - Qualcomm Kaanapali SoC TLMM support

   - Microchip pic64gx "gpio2" SoC support

   - Microchip Polarfire "iomux0" SoC support

   - CIX Semiconductors SKY1 SoC support

   - Rockchip RK3506 SoC support

   - Airhoa AN7583 chip support

  Improvements:

   - Improvements for ST Microelectronics STM32 handling of skew
     settings so input and output can have different skew settings

   - A whole bunch of device tree binding cleanups: Marvell Armada and
     Berlin, Actions Semiconductor S700 and S900, Broadcom Northstar 2
     (NS2), Bitmain BM1880 and Spreadtrum SC9860 are moved over to
     schema"

* tag 'pinctrl-v6.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (107 commits)
  pinctrl: add CONFIG_OF dependencies for microchip drivers
  pinctrl: starfive: use dynamic GPIO base allocation
  pinctrl: single: Fix incorrect type for error return variable
  MAINTAINERS: Change Linus Walleij mail address
  pinctrl: cix: Fix obscure dependency
  dt-bindings: pinctrl: cix,sky1-pinctrl: Drop duplicate newline
  dt-bindings: pinctrl: aspeed,ast2600-pinctrl: Add PCIe RC PERST# group
  pinctrl: airoha: Fix AIROHA_PINCTRL_CONFS_DRIVE_E2 in an7583_pinctrl_match_data
  pinctrl: airoha: fix pinctrl function mismatch issue
  pinctrl: cherryview: Convert to use intel_gpio_add_pin_ranges()
  pinctrl: intel: Export intel_gpio_add_pin_ranges()
  pinctrl: renesas: rzg2l: Refactor OEN register PWPR handling
  pinctrl: airoha: convert comma to semicolon
  pinctrl: elkhartlake: Switch to INTEL_GPP() macro
  pinctrl: cherryview: Switch to INTEL_GPP() macro
  pinctrl: emmitsburg: Switch to INTEL_GPP() macro
  pinctrl: denverton: Switch to INTEL_GPP() macro
  pinctrl: cedarfork: Switch to INTEL_GPP() macro
  pinctrl: airoha: add support for Airoha AN7583 PINs
  dt-bindings: pinctrl: airoha: Document AN7583 Pin Controller
  ...
</content>
</entry>
<entry>
<title>Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux</title>
<updated>2025-12-08T00:38:52+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2025-12-08T00:38:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=ba65a4e7120a616d9c592750d9147f6dcafedffa'/>
<id>urn:sha1:ba65a4e7120a616d9c592750d9147f6dcafedffa</id>
<content type='text'>
Pull clk updates from Stephen Boyd:
 "This is entirely SoC clk drivers.

  The majority diff wise is for the new Rockchip and Qualcomm clk
  drivers which is mostly lines and lines of data structures to describe
  the clk hardware in these SoCs. Beyond those two, Renesas continues to
  incrementally add clks to their SoC drivers, causing them to show up
  higher in the diffstat this time because they added quite a few clks
  all over the place.

  Overall it is a semi-quiet release that has some new clk drivers and
  the usual fixes for clock data that was wrong or missing and
  non-critical cleanups that plug error paths or fix typos.

  New Drivers:
   - Qualcomm IPQ5424 Network Subsystem Clock Controller
   - Qualcomm SM8750 Video Clock Controller
   - Rockchip RV1126B and RK3506 clock drivers
   - i.MX8ULP SIM LPAV clock driver
   - Samsung ACPM (firmware interface) clock driver
   - Altera Agilex5 clock driver"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (117 commits)
  clk: keystone: fix compile testing
  clk: keystone: syscon-clk: fix regmap leak on probe failure
  clk: qcom: Mark camcc_sm7150_hws static
  clk: samsung: exynos-clkout: Assign .num before accessing .hws
  clk: rockchip: Add clock and reset driver for RK3506
  dt-bindings: clock: rockchip: Add RK3506 clock and reset unit
  clk: actions: Fix discarding const qualifier by 'container_of' macro
  clk: spacemit: Set clk_hw_onecell_data::num before using flex array
  clk: visconti: Add VIIF clocks
  dt-bindings: clock: tmpv770x: Add VIIF clocks
  dt-bindings: clock: tmpv770x: Remove definition of number of clocks
  clk: visconti: Do not define number of clocks in bindings
  clk: rockchip: Add clock controller for the RV1126B
  dt-bindings: clock, reset: Add support for rv1126b
  clk: rockchip: Implement rockchip_clk_register_armclk_multi_pll()
  clk: qcom: x1e80100-dispcc: Add USB4 router link resets
  dt-bindings: clock: qcom: x1e80100-dispcc: Add USB4 router link resets
  clk: qcom: videocc-sm8750: Add video clock controller driver for SM8750
  dt-bindings: clock: qcom: Add SM8750 video clock controller
  clk: qcom: branch: Extend invert logic for branch2 mem clocks
  ...
</content>
</entry>
<entry>
<title>Merge tag 'soc-dt-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc</title>
<updated>2025-12-06T01:24:29+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2025-12-06T01:24:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=0cac5ce06e524755b3dac1e0a060b05992076d93'/>
<id>urn:sha1:0cac5ce06e524755b3dac1e0a060b05992076d93</id>
<content type='text'>
Pull SoC devicetree updates from Arnd Bergmann:
 "Three new SoCs got added in existing arm64 chip families:

   - Renesas R-Car X5H (R8A78000) is a new generation of automotive
     SoCs, based on 16 Cortex-A720 (Armv9.2) cores, which makes the the
     currently highest-perforance embedded SoC.

   - TI AM62L is a new variant of the AM62 family of industrial SoCs,
     this one comes without a GPU.

   - Qualcomm MSM8937 (Snapdragon 430) is an older mobile phone chip
     based on Cortex-A53, and closely related to MSM8917 (Snapdragn
     425), which we already support.

  In addition, there are a good number of newly supported machines
  across SoC families:

   - Two Aspeed AST2600 (Cortex-A7) based BMC setups for large servers

   - Mobile Phones and tables based on Mediatek MT6582, Nvidia Tegra124,
     Qualcomm MSM8937 and Qualcomm MSM8939,

   - Two Laptops based on Qualcomm SoCs: one using the older sdm850, the
     other using x1p42100.

   - One Router based on Rockchips RK3568

   - 24 variants of the Enclustra Mercury system-on-module, all based on
     32-bit Intel/Altera SocFPGA chips, plus two boards using 64-bit
     SocFPGA Agilex chips..

   - 30 industrial/embedded boards and single-board computers, using
     various chips from NXP, Rockchips, Mediatek, TI, Amlogic, Qualcomm,
     Spacemit, and Starfive.

  In total there are 783 commits here, the majority of these improving
  hardware support and cleaning up devicetree files across the tree,
  with the majority of the changes going into the Qualcomm, NXP, Renesas
  and Rockchips platforms"

* tag 'soc-dt-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (782 commits)
  arm64: dts: mediatek: mt8195: Fix address range for JPEG decoder core 1
  ARM: dts: samsung: exynos4412-midas: turn off SDIO WLAN chip during system suspend
  ARM: dts: samsung: exynos4210-trats: turn off SDIO WLAN chip during system suspend
  ARM: dts: samsung: exynos4210-i9100: turn off SDIO WLAN chip during system suspend
  ARM: dts: samsung: universal_c210: turn off SDIO WLAN chip during system suspend
  arm64: dts: amlogic: meson-g12b: Fix L2 cache reference for S922X CPUs
  arm64: dts: Add gpio_intc node for Amlogic S7D SoCs
  arm64: dts: Add gpio_intc node for Amlogic S7 SoCs
  arm64: dts: Add gpio_intc node for Amlogic S6 SoCs
  arm64: dts: amlogic: s7d: add ao secure node
  arm64: dts: amlogic: s7: add ao secure node
  arm64: dts: amlogic: s6: add ao secure node
  arm64: dts: amlogic: Fix the register name of the 'DBI' region
  dts: arm64: amlogic: add a5 pinctrl node
  arm64: dts: amlogic: s7d: add power domain controller node
  arm64: dts: amlogic: s7: add power domain controller node
  arm64: dts: amlogic: s6: add power domain controller node
  dts: arm64: amlogic: Add ISP related nodes for C3
  arm64: dts: meson: add initial device-tree for Tanix TX9 Pro
  dt-bindings: arm: amlogic: add support for Tanix TX9 Pro
  ...
</content>
</entry>
<entry>
<title>Merge branches 'clk-visconti', 'clk-imx', 'clk-microchip', 'clk-rockchip' and 'clk-qcom' into clk-next</title>
<updated>2025-12-03T18:22:37+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@kernel.org</email>
</author>
<published>2025-12-03T18:22:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=6f172175b6f3fe35b5d519fc314f7a0b603a9af9'/>
<id>urn:sha1:6f172175b6f3fe35b5d519fc314f7a0b603a9af9</id>
<content type='text'>
* clk-visconti:
  clk: visconti: Add VIIF clocks
  dt-bindings: clock: tmpv770x: Add VIIF clocks
  dt-bindings: clock: tmpv770x: Remove definition of number of clocks
  clk: visconti: Do not define number of clocks in bindings

* clk-imx:
  clk: imx: add driver for imx8ulp's sim lpav
  dt-bindings: clock: document 8ULP's SIM LPAV
  clk: imx: imx8mp-audiomix: use devm_auxiliary_device_create() to simple code
  clk: imx: Add some delay before deassert the reset

* clk-microchip:
  reset: mpfs: add non-auxiliary bus probing
  clk: lan966x: remove unused dt-bindings include
  clk: microchip: mpfs: use regmap for clocks
  dt-bindings: clk: microchip: mpfs: remove first reg region

* clk-rockchip:
  clk: rockchip: Add clock and reset driver for RK3506
  dt-bindings: clock: rockchip: Add RK3506 clock and reset unit
  clk: rockchip: Add clock controller for the RV1126B
  dt-bindings: clock, reset: Add support for rv1126b
  clk: rockchip: Implement rockchip_clk_register_armclk_multi_pll()
  dt-bindings: clock: rk3568: Drop CLK_NR_CLKS define
  clk: rockchip: rk3568: Drop CLK_NR_CLKS usage
  dt-bindings: clock: rk3568: Add SCMI clock ids

* clk-qcom: (48 commits)
  clk: qcom: Mark camcc_sm7150_hws static
  clk: qcom: x1e80100-dispcc: Add USB4 router link resets
  dt-bindings: clock: qcom: x1e80100-dispcc: Add USB4 router link resets
  clk: qcom: videocc-sm8750: Add video clock controller driver for SM8750
  dt-bindings: clock: qcom: Add SM8750 video clock controller
  clk: qcom: branch: Extend invert logic for branch2 mem clocks
  clk: qcom: ecpricc-qdu100: Add mem_enable_mask to the clock memory branch
  clk: qcom: clk_mem_branch: add enable mask and invert flags
  clk: qcom: mmcc-sdm660: Add missing MDSS reset
  dt-bindings: clock: mmcc-sdm660: Add missing MDSS reset
  clk: qcom: use different Kconfig prompts for APSS IPQ5424/6018 drivers
  clk: qcom: apss-ipq5424: remove unused 'apss_clk' structure
  dt-bindings: clock: qcom: Add Kaanapali Global clock controller
  dt-bindings: clock: qcom: Document the Kaanapali TCSR Clock Controller
  dt-bindings: clock: qcom-rpmhcc: Add RPMHCC for Kaanapali
  clk: qcom: tcsrcc-glymur: Update register offsets for clock refs
  clk: qcom: gcc-qcs615: Update the SDCC clock to use shared_floor_ops
  clk: qcom: camcc-sm7150: Fix PLL config of PLL2
  clk: qcom: camcc-sm6350: Fix PLL config of PLL2
  clk: qcom: Add NSS clock controller driver for IPQ5424
  ...
</content>
</entry>
<entry>
<title>Merge branches 'clk-socfpga', 'clk-renesas', 'clk-cleanup', 'clk-samsung' and 'clk-mediatek' into clk-next</title>
<updated>2025-12-03T18:22:24+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@kernel.org</email>
</author>
<published>2025-12-03T18:22:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=0999df60329e3e643ef3f9de72d85e712e481766'/>
<id>urn:sha1:0999df60329e3e643ef3f9de72d85e712e481766</id>
<content type='text'>
* clk-socfpga:
  clk: socfpga: agilex5: add clock driver for Agilex5

* clk-renesas: (35 commits)
  clk: renesas: r9a09g077: Add SPI module clocks
  clk: renesas: r9a09g056: Add USB3.0 clocks/resets
  clk: renesas: r9a09g057: Add USB3.0 clocks/resets
  clk: renesas: r9a09g047: Add RSCI clocks/resets
  dt-bindings: clock: renesas,r9a09g056-cpg: Add USB3.0 core clocks
  dt-bindings: clock: renesas,r9a09g057-cpg: Add USB3.0 core clocks
  clk: renesas: r9a06g032: Fix memory leak in error path
  clk: renesas: r9a09g077: Use devm_ helpers for divider clock registration
  clk: renesas: r9a09g077: Remove stray blank line
  clk: renesas: r9a09g077: Propagate rate changes to parent clocks
  clk: renesas: r8a779a0: Add 3DGE module clock
  clk: renesas: r8a779a0: Add ZG Core clock
  clk: renesas: rcar-gen4: Add support for clock dividers in FRQCRB
  dt-bindings: clock: r8a779a0: Add ZG core clock
  clk: renesas: r9a09g056: Add clock and reset entries for ISP
  clk: renesas: r9a09g056: Add support for PLLVDO, CRU clocks, and resets
  clk: renesas: r9a09g056: Add clocks and resets for DSI and LCDC modules
  clk: renesas: r9a09g077: Add TSU module clock
  clk: renesas: r9a09g057: Add clock and reset entries for DSI and LCDC
  clk: renesas: rzv2h: Add support for DSI clocks
  ...

* clk-cleanup:
  clk: keystone: fix compile testing
  clk: keystone: syscon-clk: fix regmap leak on probe failure
  clk: samsung: exynos-clkout: Assign .num before accessing .hws
  clk: actions: Fix discarding const qualifier by 'container_of' macro
  clk: spacemit: Set clk_hw_onecell_data::num before using flex array
  clk: spacemit: fix comment typo
  clk: keystone: Fix discarded const qualifiers
  clk: sprd: sc9860: Simplify with of_device_get_match_data()

* clk-samsung:
  firmware: exynos-acpm: add empty method to allow compile test
  MAINTAINERS: add ACPM clock bindings and driver
  clk: samsung: add Exynos ACPM clock driver
  firmware: exynos-acpm: register ACPM clocks pdev
  firmware: exynos-acpm: add DVFS protocol
  dt-bindings: firmware: google,gs101-acpm-ipc: add ACPM clocks
  clk: samsung: clk-pll: simplify samsung_pll_lock_wait()
  clk: samsung: exynosautov920: add block mfc clock support
  clk: samsung: exynosautov920: add clock support
  dt-bindings: clock: exynosautov920: add mfc clock definitions
  dt-bindings: clock: exynosautov920: add m2m clock definitions
  dt-bindings: clock: google,gs101-clock: add power-domains

* clk-mediatek:
  clk: en7523: Add reset-controller support for EN7523 SoC
  dt-bindings: clock: airoha: Add reset support to EN7523 clock binding
</content>
</entry>
<entry>
<title>dt-bindings: clock: rockchip: Add RK3506 clock and reset unit</title>
<updated>2025-11-23T21:56:49+00:00</updated>
<author>
<name>Finley Xiao</name>
<email>finley.xiao@rock-chips.com</email>
</author>
<published>2025-11-21T07:53:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=84898f8e9cea06f8178fc5ca53f068180f7bfba0'/>
<id>urn:sha1:84898f8e9cea06f8178fc5ca53f068180f7bfba0</id>
<content type='text'>
Add device tree bindings for clock and reset unit on RK3506 SoC.
Add clock and reset IDs for RK3506 SoC.

Signed-off-by: Finley Xiao &lt;finley.xiao@rock-chips.com&gt;
Signed-off-by: Elaine Zhang &lt;zhangqing@rock-chips.com&gt;
Reviewed-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Link: https://patch.msgid.link/20251121075350.2564860-2-zhangqing@rock-chips.com
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
</content>
</entry>
<entry>
<title>dt-bindings: clock, reset: Add support for rv1126b</title>
<updated>2025-11-20T19:50:23+00:00</updated>
<author>
<name>Elaine Zhang</name>
<email>zhangqing@rock-chips.com</email>
</author>
<published>2025-11-11T02:57:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=d0d9a9629f505ac70e1ffd172e092ff71f5d989a'/>
<id>urn:sha1:d0d9a9629f505ac70e1ffd172e092ff71f5d989a</id>
<content type='text'>
Add clock and reset ID defines for rv1126b.
Also add documentation for the rv1126b CRU core.

Signed-off-by: Elaine Zhang &lt;zhangqing@rock-chips.com&gt;
Acked-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Link: https://patch.msgid.link/20251111025738.869847-3-zhangqing@rock-chips.com
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
</content>
</entry>
<entry>
<title>dt-bindings: clock: qcom: Add SM8750 video clock controller</title>
<updated>2025-11-18T22:11:36+00:00</updated>
<author>
<name>Taniya Das</name>
<email>taniya.das@oss.qualcomm.com</email>
</author>
<published>2025-11-18T07:17:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=b190eaea57803da00a4318ba12359625337be9e8'/>
<id>urn:sha1:b190eaea57803da00a4318ba12359625337be9e8</id>
<content type='text'>
Add compatible string for SM8750 video clock controller and the bindings
for SM8750 Qualcomm SoC.

Signed-off-by: Taniya Das &lt;taniya.das@oss.qualcomm.com&gt;
Reviewed-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
Link: https://lore.kernel.org/r/20251118-sm8750-videocc-v2-v4-4-049882a70c9f@oss.qualcomm.com
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
</entry>
</feed>
