<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/Documentation/devicetree/bindings/clock, branch v6.12.80</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.12.80</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v6.12.80'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2025-12-18T12:54:44+00:00</updated>
<entry>
<title>dt-bindings: clock: qcom,x1e80100-gcc: Add missing USB4 clocks/resets</title>
<updated>2025-12-18T12:54:44+00:00</updated>
<author>
<name>Konrad Dybcio</name>
<email>konrad.dybcio@oss.qualcomm.com</email>
</author>
<published>2025-10-03T18:14:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=6a2af03a6e58ff6713f8ffafd8eb0fc334fd75f4'/>
<id>urn:sha1:6a2af03a6e58ff6713f8ffafd8eb0fc334fd75f4</id>
<content type='text'>
[ Upstream commit e4c4f5a1ae18a7828c2bfaf9dfe2473632b92d1b ]

Some of the USB4 muxes, RCGs and resets were not initially described.

Add indices for them to allow extending the driver.

Acked-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
Reviewed-by: Bryan O'Donoghue &lt;bod@kernel.org&gt;
Signed-off-by: Konrad Dybcio &lt;konrad.dybcio@oss.qualcomm.com&gt;
Link: https://lore.kernel.org/r/20251003-topic-hamoa_gcc_usb4-v2-1-61d27a14ee65@oss.qualcomm.com
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
Stable-dep-of: 8abe970efea5 ("clk: qcom: gcc-x1e80100: Add missing USB4 clocks/resets")
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: clock: Add i.MX91 clock support</title>
<updated>2025-02-08T08:57:08+00:00</updated>
<author>
<name>Pengfei Li</name>
<email>pengfei.li_1@nxp.com</email>
</author>
<published>2024-10-23T18:46:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=46b7a2d86b5ca5aec21e05bdf33669e31136a460'/>
<id>urn:sha1:46b7a2d86b5ca5aec21e05bdf33669e31136a460</id>
<content type='text'>
[ Upstream commit f029d870096fcd8565a2ee8c2d0078b9aaec4fdb ]

i.MX91 has similar Clock Control Module(CCM) design as i.MX93, only add
few new clock compared to i.MX93.
Add a new compatible string and some new clocks for i.MX91.

Signed-off-by: Pengfei Li &lt;pengfei.li_1@nxp.com&gt;
Reviewed-by: Frank Li &lt;Frank.Li@nxp.com&gt;
Acked-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Link: https://lore.kernel.org/r/20241023184651.381265-4-pengfei.li_1@nxp.com
Signed-off-by: Abel Vesa &lt;abel.vesa@linaro.org&gt;
Stable-dep-of: 32e9dea2645f ("dt-bindings: clock: imx93: Add SPDIF IPG clk")
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: clock: axi-clkgen: include AXI clk</title>
<updated>2024-12-05T13:02:16+00:00</updated>
<author>
<name>Nuno Sa</name>
<email>nuno.sa@analog.com</email>
</author>
<published>2024-10-29T13:59:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=5618b644d731d61ff9afa6d73d6eea5ba3ef0d5d'/>
<id>urn:sha1:5618b644d731d61ff9afa6d73d6eea5ba3ef0d5d</id>
<content type='text'>
[ Upstream commit 47f3f5a82a31527e027929c5cec3dd1ef5ef30f5 ]

In order to access the registers of the HW, we need to make sure that
the AXI bus clock is enabled. Hence let's increase the number of clocks
by one and add clock-names to differentiate between parent clocks and
the bus clock.

Fixes: 0e646c52cf0e ("clk: Add axi-clkgen driver")
Signed-off-by: Nuno Sa &lt;nuno.sa@analog.com&gt;
Link: https://lore.kernel.org/r/20241029-axi-clkgen-fix-axiclk-v2-1-bc5e0733ad76@analog.com
Reviewed-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux</title>
<updated>2024-09-23T22:01:48+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2024-09-23T22:01:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=9ab27b018649c9504e894496cb4d7d8afcffd897'/>
<id>urn:sha1:9ab27b018649c9504e894496cb4d7d8afcffd897</id>
<content type='text'>
Pull clk updates from Stephen Boyd:
 "The core clk framework is left largely untouched this time around
  except for support for the newly ratified DT property
  'assigned-clock-rates-u64'.

  I'm much more excited about the support for loading DT overlays from
  KUnit tests so that we can test how the clk framework parses DT nodes
  during clk registration. The clk framework has some places that are
  highly DeviceTree dependent so this charts the path to extend the
  KUnit tests to cover even more framework code in the future. I've got
  some more tests on the list that use the DT overlay support, but they
  uncovered issues with clk unregistration that I'm still working on
  fixing.

  Outside the core, the clk driver update pile is dominated by Qualcomm
  and Renesas SoCs, making it fairly usual. Looking closer, there are
  fixes for things all over the place, like adding missing clk
  frequencies or moving defines for the number of clks out of DT binding
  headers into the drivers. There are even conversions of DT bindings to
  YAML and migration away from strings to describe clk topology. Overall
  it doesn't look unusual so I expect the new drivers to be where we'll
  have fixes in the coming weeks.

  Core:
   - KUnit tests for clk registration and fixed rate basic clk type
   - A couple more devm helpers, one consumer and one provider
   - Support for assigned-clock-rates-u64

  New Drivers:
   - Camera, display and GPU clocks on Qualcomm SM4450
   - Camera clocks on Qualcomm SM8150
   - Rockchip rk3576 clks
   - Microchip SAM9X7 clks
   - Renesas RZ/V2H(P) (R9A09G057) clks

  Updates:
   - Mark a bunch of struct freq_tbl const to reduce .data usage
   - Add Qualcomm MSM8226 A7PLL and Regera PLL support
   - Fix the Qualcomm Lucid 5LPE PLL configuration sequence to not reuse
     Trion, as they do differ
   - A number of fixes to the Qualcomm SM8550 display clock driver
   - Fold Qualcomm SM8650 display clock driver into SM8550 one
   - Add missing clocks and GDSCs needed for audio on Qualcomm MSM8998
   - Add missing USB MP resets, GPLL9, and QUPv3 DFS to Qualcomm SC8180X
   - Fix sdcc clk frequency tables on Qualcomm SC8180X
   - Drop the Qualcomm SM8150 gcc_cpuss_ahb_clk_src
   - Mark Qualcomm PCIe GDSCs as RET_ON on sm8250 and sm8540 to avoid
     them turning off during suspend
   - Use the HW_CTRL mechanism on Qualcomm SM8550 video clock controller
     GDSCs
   - Get rid of CLK_NR_CLKS defines in Rockchip DT binding headers
   - Some fixes for Rockchip rk3228 and rk3588
   - Exynos850: Add clock for Thermal Management Unit
   - Exynos7885: Fix duplicated ID in the header, add missing TOP PLLs
     and add clocks for USB block in the FSYS clock controller
   - ExynosAutov9: Add DPUM clock controller
   - ExynosAutov920: Add new (first) clock controllers: TOP and PERIC0
     (and a bit more complete bindings)
   - Use clk_hw pointer instead of fw_name for acm_aud_clk[0-1]_sel
     clocks on i.MX8Q as parents in ACM provider
   - Add i.MX95 NETCMIX support to the block control provider
   - Fix parents for ENETx_REF_SEL clocks on i.MX6UL
   - Add USB clocks, resets and power domains on Renesas RZ/G3S
   - Add Generic Timer (GTM), I2C Bus Interface (RIIC), SD/MMC Host
     Interface (SDHI) and Watchdog Timer (WDT) clocks and resets on
     Renesas RZ/V2H
   - Add PCIe, PWM, and CAN-FD clocks on Renesas R-Car V4M
   - Add LCD controller clocks and resets on Renesas RZ/G2UL
   - Add DMA clocks and resets on Renesas RZ/G3S
   - Add fractional multiplication PLL support on Renesas R-Car Gen4
   - Document support for the Renesas RZ/G2M v3.0 (r8a774a3) SoC
   - Support for the Microchip SAM9X7 SoC as follows:
   - Updates for the Microchip PLL drivers
   - DT binding documentation updates (for the new clock driver and for
     the slow clock controller that SAM9X7 is using)
   - A fix for the Microchip SAMA7G5 clock driver to avoid allocating
     more memory than necessary
   - Constify some Amlogic structs
   - Add SM1 eARC clocks for Amlogic
   - Introduce a symbol namespace for Amlogic clock specific symbols
   - Add reset controller support to audiomix block control on i.MX
   - Add CLK_SET_RATE_PARENT flag to all audiomix clocks and to i.MX7D
     lcdif_pixel_src clock
   - Fix parent clocks for earc_phy and audpll on i.MX8MP
   - Fix default parents for enet[12]_ref_sel on i.MX6UL
   - Add ops in composite 8M and 93 that allow no-op on disable
   - Add check for PCC present bit on composite 7ULP register
   - Fix fractional part for fracn-gppll on prepare in i.MX
   - Fix clock tree update for TF-A managed clocks on i.MX8M
   - Drop CLK_SET_PARENT_GATE for DRAM mux on i.MX7D
   - Add the SAI7 IPG clock for i.MX8MN
   - Mark the 'nand_usdhc_bus' clock as non-critical on i.MX8MM
   - Add LVDS bypass clocks on i.MX8QXP
   - Add muxes for MIPI and PHY ref clocks on i.MX
   - Reorder dc0_bypass0_clk, lcd_pxl and dc1_disp clocks on i.MX8QXP
   - Add 1039.5MHz and 800MHz rates to fracn-gppll table on i.MX
   - Add CLK_SET_RATE_PARENT for media_disp pixel clocks on i.MX8QXP
   - Add some module descriptions to the i.MX generic and the i.MXRT1050
     driver
   - Fix return value for bypass for composite i.MX7ULP
   - Move Mediatek clk bindings to clock/
   - Convert some more clk bindings to dt schema"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (180 commits)
  clk: Switch back to struct platform_driver::remove()
  dt-bindings: clock, reset: fix top-comment indentation rk3576 headers
  clk: rockchip: remove unused mclk_pdm0_p/pdm0_p definitions
  clk: provide devm_clk_get_optional_enabled_with_rate()
  clk: fixed-rate: add devm_clk_hw_register_fixed_rate_parent_data()
  clk: imx6ul: fix clock parent for IMX6UL_CLK_ENETx_REF_SEL
  clk: renesas: r9a09g057: Add clock and reset entries for GTM/RIIC/SDHI/WDT
  clk: renesas: rzv2h: Add support for dynamic switching divider clocks
  clk: renesas: r9a08g045: Add clocks, resets and power domains for USB
  clk: rockchip: fix error for unknown clocks
  clk: rockchip: rk3588: drop unused code
  clk: rockchip: Add clock controller for the RK3576
  clk: rockchip: Add new pll type pll_rk3588_ddr
  dt-bindings: clock, reset: Add support for rk3576
  dt-bindings: clock: rockchip,rk3588-cru: drop unneeded assigned-clocks
  clk: rockchip: rk3588: Fix 32k clock name for pmu_24m_32k_100m_src_p
  clk: imx95: enable the clock of NETCMIX block control
  dt-bindings: clock: add RMII clock selection
  dt-bindings: clock: add i.MX95 NETCMIX block control
  clk: imx: imx8: Use clk_hw pointer for self registered clock in clk_parent_data
  ...
</content>
</entry>
<entry>
<title>Merge branches 'clk-devm', 'clk-samsung', 'clk-rockchip' and 'clk-qcom' into clk-next</title>
<updated>2024-09-21T21:11:05+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@kernel.org</email>
</author>
<published>2024-09-21T21:11:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=1b189f71e19c431ee5777f85d1d800a43bee58b9'/>
<id>urn:sha1:1b189f71e19c431ee5777f85d1d800a43bee58b9</id>
<content type='text'>
* clk-devm:
  clk: provide devm_clk_get_optional_enabled_with_rate()
  clk: fixed-rate: add devm_clk_hw_register_fixed_rate_parent_data()

* clk-samsung:
  clk: samsung: add top clock support for ExynosAuto v920 SoC
  clk: samsung: clk-pll: Add support for pll_531x
  dt-bindings: clock: add ExynosAuto v920 SoC CMU bindings
  clk: samsung: exynos7885: Add USB related clocks to CMU_FSYS
  clk: samsung: clk-pll: Add support for pll_1418x
  clk: samsung: exynosautov9: add dpum clock support
  dt-bindings: clock: exynosautov9: add dpum clock
  clk: samsung: exynos7885: Add missing MUX clocks from PLLs in CMU_TOP
  clk: samsung: exynos7885: Update CLKS_NR_FSYS after bindings fix
  dt-bindings: clock: exynos7885: Add indices for USB clocks
  dt-bindings: clock: exynos7885: Add CMU_TOP PLL MUX indices
  dt-bindings: clock: exynos7885: Fix duplicated binding
  clk: samsung: exynos850: Add TMU clock
  dt-bindings: clock: exynos850: Add TMU clock

* clk-rockchip:
  dt-bindings: clock, reset: fix top-comment indentation rk3576 headers
  clk: rockchip: remove unused mclk_pdm0_p/pdm0_p definitions
  clk: rockchip: fix error for unknown clocks
  clk: rockchip: rk3588: drop unused code
  clk: rockchip: Add clock controller for the RK3576
  clk: rockchip: Add new pll type pll_rk3588_ddr
  dt-bindings: clock, reset: Add support for rk3576
  dt-bindings: clock: rockchip,rk3588-cru: drop unneeded assigned-clocks
  clk: rockchip: rk3588: Fix 32k clock name for pmu_24m_32k_100m_src_p
  dt-bindings: clock: rockchip: remove CLK_NR_CLKS and CLKPMU_NR_CLKS
  clk: rockchip: rk3399: Drop CLK_NR_CLKS CLKPMU_NR_CLKS usage
  clk: rockchip: rk3368: Drop CLK_NR_CLKS usage
  clk: rockchip: rk3328: Drop CLK_NR_CLKS usage
  clk: rockchip: rk3308: Drop CLK_NR_CLKS usage
  clk: rockchip: rk3288: Drop CLK_NR_CLKS usage
  clk: rockchip: rk3228: Drop CLK_NR_CLKS usage
  clk: rockchip: rk3036: Drop CLK_NR_CLKS usage
  clk: rockchip: px30: Drop CLK_NR_CLKS CLKPMU_NR_CLKS usage
  clk: rockchip: Set parent rate for DCLK_VOP clock on RK3228

* clk-qcom: (47 commits)
  clk: qcom: videocc-sm8550: Use HW_CTRL_TRIGGER flag for video GDSC's
  clk: qcom: dispcc-sm8250: use special function for Lucid 5LPE PLL
  clk: qcom: dispcc-sm8250: use CLK_SET_RATE_PARENT for branch clocks
  clk: qcom: ipq5332: Use icc-clk for enabling NoC related clocks
  clk: qcom: ipq5332: Register gcc_qdss_tsctr_clk_src
  dt-bindings: usb: qcom,dwc3: Update ipq5332 clock details
  dt-bindings: interconnect: Add Qualcomm IPQ5332 support
  clk: qcom: gcc-msm8998: Add Q6 BIMC and LPASS core, ADSP SMMU clocks
  dt-bindings: clock: gcc-msm8998: Add Q6 and LPASS clocks definitions
  clk: qcom: Fix SM_CAMCC_8150 dependencies
  clk: qcom: gcc-sm8150: De-register gcc_cpuss_ahb_clk_src
  clk: qcom: gcc-sc8180x: Fix the sdcc2 and sdcc4 clocks freq table
  clk: qcom: gcc-sc8180x: Add GPLL9 support
  dt-bindings: clock: qcom: Add GPLL9 support on gcc-sc8180x
  clk: qcom: gcc-sc8180x: Register QUPv3 RCGs for DFS on sc8180x
  clk: qcom: clk-rpmh: Fix overflow in BCM vote
  dt-bindings: clock: qcom: Drop required-opps in required on SM8650 camcc
  dt-bindings: clock: qcom: Drop required-opps in required on sm8650 videocc
  dt-bindings: clock: qcom,qcs404-turingcc: convert to dtschema
  dt-bindings: clock: Add x1e80100 LPASSCC reset controller
  ...
</content>
</entry>
<entry>
<title>Merge branches 'clk-amlogic', 'clk-microchip' and 'clk-imx' into clk-next</title>
<updated>2024-09-21T21:10:59+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@kernel.org</email>
</author>
<published>2024-09-21T21:10:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=6629108252e529c1e0951613b3dc1182e2eb68d3'/>
<id>urn:sha1:6629108252e529c1e0951613b3dc1182e2eb68d3</id>
<content type='text'>
* clk-amlogic:
  clk: meson: introduce symbol namespace for amlogic clocks
  clk: meson: axg-audio: add sm1 earcrx clocks
  clk: meson: axg-audio: setup regmap max_register based on the SoC
  dt-bindings: clock: axg-audio: add earcrx clock ids
  clk: meson: s4: pll: Constify struct regmap_config
  clk: meson: s4: peripherals: Constify struct regmap_config
  clk: meson: c3: pll: Constify struct regmap_config
  clk: meson: c3: peripherals: Constify struct regmap_config
  clk: meson: a1: pll: Constify struct regmap_config
  clk: meson: a1: peripherals: Constify struct regmap_config

* clk-microchip:
  clk: at91: sama7g5: Allocate only the needed amount of memory for PLLs
  clk: at91: sam9x7: add sam9x7 pmc driver
  dt-bindings: clock: at91: Allow PLLs to be exported and referenced in DT
  clk: at91: sama7g5: move mux table macros to header file
  clk: at91: sam9x7: add support for HW PLL freq dividers
  clk: at91: clk-sam9x60-pll: re-factor to support individual core freq outputs
  dt-bindings: clocks: atmel,at91rm9200-pmc: add sam9x7 clock controller
  dt-bindings: clocks: atmel,at91sam9x5-sckc: add sam9x7

* clk-imx: (27 commits)
  clk: imx6ul: fix clock parent for IMX6UL_CLK_ENETx_REF_SEL
  clk: imx95: enable the clock of NETCMIX block control
  dt-bindings: clock: add RMII clock selection
  dt-bindings: clock: add i.MX95 NETCMIX block control
  clk: imx: imx8: Use clk_hw pointer for self registered clock in clk_parent_data
  clk: imx: composite-7ulp: Use NULL instead of 0
  clk: imx: add missing MODULE_DESCRIPTION() macros
  clk: imx: clk-imx8mp: Allow media_disp pixel clock reconfigure parent rate
  clk: imx: fracn-gppll: update rate table
  clk: imx: imx8qxp: Parent should be initialized earlier than the clock
  clk: imx: imx8qxp: Register dc0_bypass0_clk before disp clk
  clk: imx: imx8qxp: Add clock muxes for MIPI and PHY ref clocks
  clk: imx: imx8qxp: Add LVDS bypass clocks
  clk: imx: imx8mm: Change the 'nand_usdhc_bus' clock to non-critical one
  clk: imx: imx8mn: add sai7_ipg_clk clock settings
  clk: imx: add CLK_SET_RATE_PARENT for lcdif_pixel_src for i.MX7D
  clk: imx: Remove CLK_SET_PARENT_GATE for DRAM mux for i.MX7D
  clk: imx: imx8mp: fix clock tree update of TF-A managed clocks
  clk: imx: fracn-gppll: fix fractional part of PLL getting lost
  clk: imx: composite-7ulp: Check the PCC present bit
  ...
</content>
</entry>
<entry>
<title>Merge branches 'clk-assigned-rates', 'clk-renesas' and 'clk-scmi' into clk-next</title>
<updated>2024-09-21T21:10:53+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@kernel.org</email>
</author>
<published>2024-09-21T21:10:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=c7183ff52f253f146084be1bfb4b80de7ffbd346'/>
<id>urn:sha1:c7183ff52f253f146084be1bfb4b80de7ffbd346</id>
<content type='text'>
* clk-assigned-rates:
  clk: clk-conf: support assigned-clock-rates-u64

* clk-renesas: (34 commits)
  clk: renesas: r9a09g057: Add clock and reset entries for GTM/RIIC/SDHI/WDT
  clk: renesas: rzv2h: Add support for dynamic switching divider clocks
  clk: renesas: r9a08g045: Add clocks, resets and power domains for USB
  dt-bindings: clock: renesas,cpg-clocks: Add top-level constraints
  clk: renesas: r8a779h0: Add CANFD clock
  clk: renesas: Add RZ/V2H(P) CPG driver
  clk: renesas: Add family-specific clock driver for RZ/V2H(P)
  dt-bindings: clock: renesas: Document RZ/V2H(P) SoC CPG
  clk: renesas: r8a779h0: Add PWM clock
  dt-bindings: clock: renesas,cpg-mssr: Document RZ/G2M v3.0 (r8a774a3) clock
  clk: renesas: rcar-gen4: Remove unused default PLL2/3/4/6 configs
  clk: renesas: rcar-gen4: Remove unused fixed PLL clock types
  clk: renesas: rcar-gen4: Remove unused variable PLL2 clock type
  clk: renesas: r8a779h0: Model PLL1/2/3/4/6 as fractional PLLs
  clk: renesas: r8a779g0: Model PLL1/3/4/6 as fractional PLLs
  clk: renesas: r8a779f0: Model PLL1/2/3/6 as fractional PLLs
  clk: renesas: r8a779a0: Use defines for PLL control registers
  clk: renesas: rcar-gen4: Add support for fractional 9.24 PLLs
  clk: renesas: rcar-gen4: Add support for fixed variable PLLs
  clk: renesas: rcar-gen4: Add support for variable fractional PLLs
  ...

* clk-scmi:
  clk: scmi: add is_prepared hook
</content>
</entry>
<entry>
<title>Merge branches 'clk-kunit', 'clk-mediatek', 'clk-cleanup' and 'clk-bindings' into clk-next</title>
<updated>2024-09-21T21:10:42+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@kernel.org</email>
</author>
<published>2024-09-21T21:10:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=a2b88026f74867fbf77e886076d0b8c11f56a166'/>
<id>urn:sha1:a2b88026f74867fbf77e886076d0b8c11f56a166</id>
<content type='text'>
 - KUnit tests for clk registration and fixed rate basic clk type

* clk-kunit:
  clk: Add KUnit tests for clks registered with struct clk_parent_data
  clk: Add KUnit tests for clk fixed rate basic type
  clk: Add test managed clk provider/consumer APIs
  platform: Add test managed platform_device/driver APIs
  of: Add a KUnit test for overlays and test managed APIs
  dt-bindings: vendor-prefixes: Add "test" vendor for KUnit and friends
  of: Add test managed wrappers for of_overlay_apply()/of_node_put()
  of/platform: Allow overlays to create platform devices from the root node

* clk-mediatek:
  dt-bindings: clock: mediatek: Convert MediaTek clock syscons to schema
  dt-bindings: Move Mediatek clock controllers to "clock" directory
  dt-bindings: clock: mediatek,apmixedsys: Fix "mediatek,mt6779-apmixed" compatible
  clk: mediatek: reset: Remove unused mtk_register_reset_controller()
  clk: mediatek: reset: Return regmap's error code

* clk-cleanup:
  clk: starfive: Use pm_runtime_resume_and_get to fix pm_runtime_get_sync() usage
  clk: ti: dra7-atl: Fix leak of of_nodes
  clk:davinci: make use of dev_err_cast_probe()
  clk: bcm: bcm53573: fix OF node leak in init
  clk: lmk04832: Use devm_clk_get_enabled() helpers
  clk: visconti: Switch to use kmemdup_array()
  clk: mmp: Switch to use kmemdup_array()
  clk: hisilicon: Remove unnecessary local variable
  clk: use clk_core_unlink_consumer() helper
  clk: Use of_property_present()
  clk: at91: Use of_property_count_u32_elems() to get property length
  da8xx-cfgchip.c: replace of_node_put with __free improves cleanup

* clk-bindings:
  dt-bindings: clock: st,stm32mp1-rcc: add top-level constraints
  dt-bindings: clock: cirrus,lochnagar: add top-level constraints
  dt-bindings: clock: baikal,bt1-ccu-div: add top-level constraints
  dt-bindings: clock: nxp,lpc3220-usb-clk: Convert bindings to dtschema
  dt-bindings: clock: nxp,lpc3220-clk: Convert bindings to DT schema
</content>
</entry>
<entry>
<title>Merge tag 'devicetree-for-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux</title>
<updated>2024-09-19T06:38:51+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2024-09-19T06:38:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=2a17bb8c204f2b6461524a1b52ace2dbe097eaf7'/>
<id>urn:sha1:2a17bb8c204f2b6461524a1b52ace2dbe097eaf7</id>
<content type='text'>
Pull devicetree updates from Rob Herring:
 "DT Bindings:

   - Drop duplicate devices in trivial-devices.yaml

   - Add a common serial peripheral device schema and reference it in
     serial device schemas.

   - Convert nxp,lpc1850-wdt, zii,rave-wdt, ti,davinci-wdt,
     snps,archs-pct, fsl,bcsr, fsl,fpga-qixis-i2c, fsl,fpga-qixis,
     fsl,cpm-enet, fsl,cpm-mdio, fsl,ucc-hdlc, maxim,ds26522,
     aspeed,ast2400-cvic, aspeed,ast2400-vic, fsl,ftm-timer,
     ti,davinci-timer, fsl,rcpm, and qcom,ebi2 to DT schema

   - Add support for rockchip,rk3576-wdt, qcom,apss-wdt-sa8255p,
     fsl,imx8qm-irqsteer, qcom,pm6150-vib, qcom,sa8255p-pdc,
     isil,isl69260, ti,tps546d24, and lpc32xx DMA mux

   - Drop duplicate nvidia,tegra186-ccplex-cluster.yaml and
     mediatek,mt6795-sys-clock.yaml

   - Add arm,gic ESPI and EPPI interrupt type specifiers

   - Add another batch of legacy compatible strings which we have no
     intention of documenting

   - Add dmas/dma-names properties to FSL lcdif

   - Fix wakeup-source reference to m8921-keypad.yaml

   - Treewide fixes of typos in bindings

  DT Core:

   - Update dtc/libfdt to upstream version v1.7.0-95-gbcd02b523429

   - More conversions to scoped iterators and __free() initializer

   - Handle overflows in address resources on 32-bit systems

   - Extend extracting compatible strings in sources from function
     parameters

   - Use of_property_present() in DT unittest

   - Clean-up of_irq_to_resource() to use helpers

   - Support #msi-cells=&lt;0&gt; in of_msi_get_domain()

   - Improve the kerneldoc for of_property_match_string()

   - kselftest: Ignore nodes that have ancestors disabled"

* tag 'devicetree-for-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (59 commits)
  dt-bindings: watchdog: Add rockchip,rk3576-wdt compatible
  dt-bindings: cpu: Drop duplicate nvidia,tegra186-ccplex-cluster.yaml
  dt-bindings: clock: mediatek: Drop duplicate mediatek,mt6795-sys-clock.yaml
  of/irq: Use helper to define resources
  of/irq: Make use of irq_get_trigger_type()
  dt-bindings: clk: vc5: Make SD/OE pin configuration properties not required
  drivers/of: Improve documentation for match_string
  of: property: Do some clean up with use of __free()
  dt-bindings: watchdog: qcom-wdt: document support on SA8255p
  dt-bindings: interrupt-controller: fsl,irqsteer: Document fsl,imx8qm-irqsteer
  dt-bindings: interrupt-controller: arm,gic: add ESPI and EPPI specifiers
  dt-bindings: dma: Add lpc32xx DMA mux binding
  dt-bindings: trivial-devices: Drop duplicate "maxim,max1237"
  dt-bindings: trivial-devices: Drop duplicate LM75 compatible devices
  dt-bindings: trivial-devices: Deprecate "ad,ad7414"
  dt-bindings: trivial-devices: Drop incorrect and duplicate at24 compatibles
  dt-bindings: wakeup-source: update reference to m8921-keypad.yaml
  dt-bindings: interrupt-controller: qcom-pdc: document support for SA8255p
  dt-bindings: Fix various typos
  of: address: Unify resource bounds overflow checking
  ...
</content>
</entry>
<entry>
<title>Merge tag 'soc-drivers-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc</title>
<updated>2024-09-17T08:48:09+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2024-09-17T08:48:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=b8979c6b4d0d1b36e94f5bc483fd86e38107e554'/>
<id>urn:sha1:b8979c6b4d0d1b36e94f5bc483fd86e38107e554</id>
<content type='text'>
Pull SoC driver updates from Arnd Bergmann:
 "The driver updates seem larger this time around, with changes is many
  of the SoC specific drivers, both the custom drivers/soc ones and the
  closely related subsystems (memory, bus, firmware, reset, ...).

  The at91 platform gains support for sam9x7 chips in the soc and power
  management code. This is the latest variant of one of the oldest still
  supported SoC families, using the ARM9 (ARMv5) core.

  As usual, the qualcomm snapdragon platform gets a ton of updates in
  many of their drivers to add more features and additional SoC support.
  Most of these are somewhat firmware related as the platform has a
  number of firmware based interfaces to the kernel. A notable addition
  here is the inclusion of trace events to two of these drivers.

  Herve Codina and Christophe Leroy are now sending updates for
  drivers/soc/fsl/ code through the SoC tree, this contains both PowerPC
  and Arm specific platforms and has previously been problematic to
  maintain. The first update here contains support for newer PowerPC
  variants and some cleanups.

  The turris mox firmware driver has a number of updates, mostly
  cleanups.

  The Arm SCMI firmware driver gets a major rework to modularize the
  existing code into separately loadable drivers for the various
  transports, the addition of custom NXP i.MX9 interfaces and a number
  of smaller updates.

  The Arm FF-A firmware driver gets a feature update to support the v1.2
  version of the specification.

  The reset controller drivers have some smaller cleanups and a newly
  added driver for the Intel/Mobileye EyeQ5/EyeQ6 MIPS SoCs.

  The memory controller drivers get some cleanups and refactoring for
  Tegra, TI, Freescale/NXP and a couple more platforms.

  Finally there are lots of minor updates to firmware (raspberry pi,
  tegra, imx), bus (sunxi, omap, tegra) and soc (rockchips, tegra,
  amlogic, mediatek) drivers and their DT bindings"

* tag 'soc-drivers-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (212 commits)
  firmware: imx: remove duplicate scmi_imx_misc_ctrl_get()
  platform: cznic: turris-omnia-mcu: Fix error check in omnia_mcu_register_trng()
  bus: sunxi-rsb: Simplify code with dev_err_probe()
  soc: fsl: qe: ucc: Export ucc_mux_set_grant_tsa_bkpt
  soc: fsl: cpm1: qmc: Fix dependency on fsl_soc.h
  dt-bindings: arm: rockchip: Add rk3576 compatible string to pmu.yaml
  soc: fsl: qbman: Remove redundant warnings
  soc: fsl: qbman: Use iommu_paging_domain_alloc()
  MAINTAINERS: Add QE files related to the Freescale QMC controller
  soc: fsl: cpm1: qmc: Handle QUICC Engine (QE) soft-qmc firmware
  soc: fsl: cpm1: qmc: Add support for QUICC Engine (QE) implementation
  soc: fsl: qe: Add missing PUSHSCHED command
  soc: fsl: qe: Add resource-managed muram allocators
  soc: fsl: cpm1: qmc: Introduce qmc_version
  soc: fsl: cpm1: qmc: Rename SCC_GSMRL_MODE_QMC
  soc: fsl: cpm1: qmc: Handle RPACK initialization
  soc: fsl: cpm1: qmc: Rename qmc_chan_command()
  soc: fsl: cpm1: qmc: Introduce qmc_{init,exit}_xcc() and their CPM1 version
  soc: fsl: cpm1: qmc: Introduce qmc_init_resource() and its CPM1 version
  soc: fsl: cpm1: qmc: Re-order probe() operations
  ...
</content>
</entry>
</feed>
