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| author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2018-12-07 14:01:25 +0300 |
|---|---|---|
| committer | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2018-12-20 13:02:40 +0300 |
| commit | 4a1500db2b42d08e41cea6b84ef2fc8a04a37edd (patch) | |
| tree | 2dc5d4738aae3cacf41aebb0dbc1d23fdf21a75c /BaseTools/Source/Python/CommonDataClass/CommonClass.py | |
| parent | 6bd42402f70ba0db9161fc59301b60ee82ba1c09 (diff) | |
| download | edk2-4a1500db2b42d08e41cea6b84ef2fc8a04a37edd.tar.xz | |
ArmVirtPkg/MemoryInitPeiLib: split memory HOB based on MAX_ALLOC_ADDRESS
The current ArmVirtMemoryInitPeiLib code splits the memory region passed
via PcdSystemMemoryBase/PcdSystemMemorySize in two if the region extends
beyond the MAX_ADDRESS limit. This was introduced for 32-bit ARM, which
may support more than 4 GB of physical address space, but cannot address
all of it via a 1:1 mapping, and a single region that is not mappable
in its entirety is unusable by the PEI core.
AArch64 is in a similar situation now: platforms may support more than
256 TB of physical address space, but only 256 TB is addressable by the
CPU, and so a memory region that extends from below this limit to above
it should be split.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Diffstat (limited to 'BaseTools/Source/Python/CommonDataClass/CommonClass.py')
0 files changed, 0 insertions, 0 deletions
