<feed xmlns='http://www.w3.org/2005/Atom'>
<title>Tianocore/edk2.git/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c, branch edk2_master</title>
<subtitle>EDK II (mirror)</subtitle>
<id>https://git.radix-linux.su/Tianocore/edk2.git/atom?h=edk2_master</id>
<link rel='self' href='https://git.radix-linux.su/Tianocore/edk2.git/atom?h=edk2_master'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/'/>
<updated>2025-10-03T17:14:30+00:00</updated>
<entry>
<title>ShellPkg/pci.c: Fix typo in source code.</title>
<updated>2025-10-03T17:14:30+00:00</updated>
<author>
<name>Chasel Chiu</name>
<email>chasel.chiu@intel.com</email>
</author>
<published>2025-10-03T15:58:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=5cf1be671b6869677fe22bebb38ac8519a53089e'/>
<id>urn:sha1:5cf1be671b6869677fe22bebb38ac8519a53089e</id>
<content type='text'>
Signed-off-by: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
</content>
</entry>
<entry>
<title>ShellPkg: Add PCIe boundary check and enhance DVSEC size calculation</title>
<updated>2025-10-03T17:14:30+00:00</updated>
<author>
<name>Pranav V V</name>
<email>pranav.v.v@intel.com</email>
</author>
<published>2025-09-26T08:34:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=5550d8f0b7ce57450a118864470638ced82ce403'/>
<id>urn:sha1:5550d8f0b7ce57450a118864470638ced82ce403</id>
<content type='text'>
1. Safe wrapper function for DumpHex that validates PCI configuration
   space boundaries. This function ensures that hex dumps do not exceed
   the standard 4KB PCIe configuration space boundary. If the requested
   dump would exceed this boundary, it prints an error message and
   truncates the dump size to remain within valid bounds.

2. Enhance DVSEC capability structure size calculation method. Size is
   now obtained from the DesignatedVendorSpecificHeader1.Bits.DvsecLength
   register.

Issue: https://github.com/tianocore/edk2/issues/11554

Signed-off-by: Pranav V V &lt;pranav.v.v@intel.com&gt;
</content>
</entry>
<entry>
<title>ShellPkg: Use the newly introduced ShellPrintDefaultEx() alias</title>
<updated>2025-10-01T08:02:57+00:00</updated>
<author>
<name>Pierre Gondois</name>
<email>pierre.gondois@arm.com</email>
</author>
<published>2025-09-18T12:13:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=aa29d51637d75aaf398fc8bda60af9726690615c'/>
<id>urn:sha1:aa29d51637d75aaf398fc8bda60af9726690615c</id>
<content type='text'>
Make use the newly introduced ShellPrintDefaultEx() alias and
replace wherever it is possible:
- "ShellPrintEx (-1, -1,"
with:
- "ShellPrintDefaultEx ("

No functional change is introduced.

Signed-off-by: Pierre Gondois &lt;pierre.gondois@arm.com&gt;
</content>
</entry>
<entry>
<title>ShellPkg: Use the newly introduced ShellPrintHiiDefaultEx() alias</title>
<updated>2025-10-01T08:02:57+00:00</updated>
<author>
<name>Pierre Gondois</name>
<email>pierre.gondois@arm.com</email>
</author>
<published>2025-09-18T12:12:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=c4a8b001f34c19cd411566cb4cd672eb1fac5478'/>
<id>urn:sha1:c4a8b001f34c19cd411566cb4cd672eb1fac5478</id>
<content type='text'>
Make use the newly introduced ShellPrintHiiDefaultEx() alias and
replace wherever it is possible:
- "ShellPrintHiiEx (-1, -1, NULL,"
with:
- "ShellPrintHiiDefaultEx ("

No functional change is introduced.

Signed-off-by: Pierre Gondois &lt;pierre.gondois@arm.com&gt;
</content>
</entry>
<entry>
<title>ShellPkg: Add support for PCIe Extended IDs</title>
<updated>2025-09-05T12:04:06+00:00</updated>
<author>
<name>Nanjinmoorthyj</name>
<email>nanjinmoorthyj@ami.com</email>
</author>
<published>2025-08-06T06:37:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=c992bffaeff75f050e27613a669f327d36c36cf9'/>
<id>urn:sha1:c992bffaeff75f050e27613a669f327d36c36cf9</id>
<content type='text'>
Add a support to print PTM (001F) structure.

Signed-off-by: Nanjinmoorthy &lt;nanjinmoorthyj@ami.com&gt;
</content>
</entry>
<entry>
<title>ShellPkg: Add PCIe extended capability</title>
<updated>2025-04-30T04:11:42+00:00</updated>
<author>
<name>Cian Costello</name>
<email>ccostello@nvidia.com</email>
</author>
<published>2025-04-18T22:48:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=defdccd4aeb1a77353e54f2a061e9ffac02acc6c'/>
<id>urn:sha1:defdccd4aeb1a77353e54f2a061e9ffac02acc6c</id>
<content type='text'>
Updates PCIe shell command to display previously undefined
PCIe extended capabilities.

Signed-off-by: Cian Costello &lt;ccostello@nvidia.com&gt;
</content>
</entry>
<entry>
<title>ShellPkg: UefiShellDebug1CommandsLib: CodeQL Fixes</title>
<updated>2024-10-29T02:09:18+00:00</updated>
<author>
<name>Oliver Smith-Denny</name>
<email>osde@microsoft.com</email>
</author>
<published>2024-10-03T17:23:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=040afc1e3be6e3d334c2483803b0470a34bced55'/>
<id>urn:sha1:040afc1e3be6e3d334c2483803b0470a34bced55</id>
<content type='text'>
Includes changes across the module for the following CodeQL rules:
- cpp/comparison-with-wider-type
- cpp/overflow-buffer
- cpp/redundant-null-check-param
- cpp/uselesstest

Co-authored-by: Taylor Beebe &lt;taylor.d.beebe@gmail.com&gt;

Signed-off-by: Oliver Smith-Denny &lt;osde@linux.microsoft.com&gt;
</content>
</entry>
<entry>
<title>ShellPkg/Pci.c: Update supported link speed to PCIe Gen6</title>
<updated>2024-06-07T09:06:49+00:00</updated>
<author>
<name>HoraceX Lien</name>
<email>horacex.lien@intel.com</email>
</author>
<published>2024-05-27T05:27:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=665b223d57369d8b28dcdc81352428adfe435ff4'/>
<id>urn:sha1:665b223d57369d8b28dcdc81352428adfe435ff4</id>
<content type='text'>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4779

Refer to PCI express base specification Reversion 6.2,
table 7-23 Link Capabilities Register.
Supported Link Speeds Vector bit 5: speed 64 GT/s.
Add the support to shell command 'pci'.

Signed-off-by: HoraceX Lien &lt;horacex.lien@intel.com&gt;
Cc: Zhichao Gao &lt;zhichao.gao@intel.com&gt;
Reviewed-by: Zhichao Gao &lt;zhichao.gao@intel.com&gt;
</content>
</entry>
<entry>
<title>ShellPkg: Apply uncrustify changes</title>
<updated>2021-12-07T17:24:28+00:00</updated>
<author>
<name>Michael Kubacki</name>
<email>michael.kubacki@microsoft.com</email>
</author>
<published>2021-12-05T22:54:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=47d20b54f9a65b08aa602a1866c1b59a69088dfc'/>
<id>urn:sha1:47d20b54f9a65b08aa602a1866c1b59a69088dfc</id>
<content type='text'>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the ShellPkg package

Cc: Andrew Fish &lt;afish@apple.com&gt;
Cc: Leif Lindholm &lt;leif@nuviainc.com&gt;
Cc: Michael D Kinney &lt;michael.d.kinney@intel.com&gt;
Signed-off-by: Michael Kubacki &lt;michael.kubacki@microsoft.com&gt;
Reviewed-by: Ray Ni &lt;ray.ni@intel.com&gt;
</content>
</entry>
<entry>
<title>ShellPkg/Pci: Add valid check for PCI extended config space parser</title>
<updated>2021-03-22T01:37:30+00:00</updated>
<author>
<name>VincentX Ke</name>
<email>vincentx.ke@intel.com</email>
</author>
<published>2021-04-10T14:15:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=3d0df0f076e120c6faf3c1892fffa21b4f31ed84'/>
<id>urn:sha1:3d0df0f076e120c6faf3c1892fffa21b4f31ed84</id>
<content type='text'>
Bugzilla: 3262 (https://bugzilla.tianocore.org/show_bug.cgi?id=3262)

No need to print PCIe details while CapabilityId is 0xFFFF.
Limit the NextCapabilityOffset to PCI configuration space.

Signed-off-by: VincentX Ke &lt;vincentx.ke@intel.com&gt;
Reviewed-by: Zhichao Gao &lt;zhichao.gao@intel.com&gt;
</content>
</entry>
</feed>
