<feed xmlns='http://www.w3.org/2005/Atom'>
<title>Tianocore/edk2.git/OvmfPkg/Library/BaseMemEncryptSevLib/X64, branch master</title>
<subtitle>EDK II (mirror)</subtitle>
<id>https://git.radix-linux.su/Tianocore/edk2.git/atom?h=master</id>
<link rel='self' href='https://git.radix-linux.su/Tianocore/edk2.git/atom?h=master'/>
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<updated>2026-09-11T08:27:12+00:00</updated>
<entry>
<title>OvmfPkg/BaseMemEncryptSevLib: Fix read-only pagetable support</title>
<updated>2026-09-11T08:27:12+00:00</updated>
<author>
<name>Tom Lendacky</name>
<email>thomas.lendacky@amd.com</email>
</author>
<published>2026-09-10T14:29:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=664068240f91d2b677d1179afcceb566fa8584a2'/>
<id>urn:sha1:664068240f91d2b677d1179afcceb566fa8584a2</id>
<content type='text'>
SetMemoryEncDec() ensures that any newly created pagetable pages are
marked read-only upon completion of the pagetable changes. This is done
by calling EnablePageTableProtection(). EnablePageTableProtection()
invokes SetPageTablePoolReadOnly() which expects the input PageTableBase
parameter to point to the beginning of the level 4 pagetable as it
calculates the offset/index into the pagetable based on the input address.

However, there is a bug that is seen when the input address is above
512GB. SetMemoryEncDec() uses the PageMapLevel4Entry variable when it
invokes EnablePageTableProtection(), which points to the start of the
level 4 pagetable if the address is below 512GB. Once above that range,
PageMapLevel4Entry points past the start of the pagetable. This causes
SetPageTablePoolReadOnly() to improperly address pagetable entries.

This was recently exposed when 7735ed4f8eb3 ("OvmfPkg/PlatformInitLib:
Set dynamic MMIO window size to 1/4") pushed the MMIO range above 512GB.

Fix the issue by always using the Cr3BaseAddress value when calling
EnablePageTableProtection().

Since PageMapLevel4Entry is never used outside of the loop anymore,
remove the initialization to NULL. Also, the check for Cr3BaseAddress
being NULL does not need to be done inside the loop, so move it to outside
the loop (which will suppress incorrect compiler/analyzer warnings).

Signed-off-by: Tom Lendacky &lt;thomas.lendacky@amd.com&gt;
</content>
</entry>
<entry>
<title>OvmfPkg/BaseMemEncryptSevLib: IGVM data HOB ranges are prevalidated</title>
<updated>2026-04-08T20:38:21+00:00</updated>
<author>
<name>Gerd Hoffmann</name>
<email>kraxel@redhat.com</email>
</author>
<published>2026-04-01T12:01:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=3ed3b7a4aeaf12040f33a138af6767403cde0126'/>
<id>urn:sha1:3ed3b7a4aeaf12040f33a138af6767403cde0126</id>
<content type='text'>
Exclude these ranges in addition to the ranges from the static
mPreValidatedRange array, by checking the IGVM data HOBs in
DetectPreValidatedOverLap().

Signed-off-by: Gerd Hoffmann &lt;kraxel@redhat.com&gt;
</content>
</entry>
<entry>
<title>OvmfPkg/BaseMemEncryptSevLib: DEBUG_VERBOSE -&gt; DEBUG_PAGING</title>
<updated>2026-03-23T09:55:50+00:00</updated>
<author>
<name>Gerd Hoffmann</name>
<email>kraxel@redhat.com</email>
</author>
<published>2025-10-02T09:53:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=3d6453f515cdbe829c2a17f0ba95ae352811bc6e'/>
<id>urn:sha1:3d6453f515cdbe829c2a17f0ba95ae352811bc6e</id>
<content type='text'>
Use new DEBUG_PAGING log bit in OvmfPkg/BaseMemEncryptSevLib.

Signed-off-by: Gerd Hoffmann &lt;kraxel@redhat.com&gt;
</content>
</entry>
<entry>
<title>OvmfPkg: Replace include guards with #pragma once</title>
<updated>2026-02-23T21:01:28+00:00</updated>
<author>
<name>Michael Kubacki</name>
<email>michael.kubacki@microsoft.com</email>
</author>
<published>2026-02-03T19:10:06+00:00</published>
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<id>urn:sha1:a536e5d6991ebb18cdc0a29e224ce5bd50ca9bc0</id>
<content type='text'>
Replace traditional `#ifndef`/`#define`/`#endif` include guards with
`#pragma` once.

`#pragma once` is a widely supported preprocessor directive that
prevents header files from being included multiple times. It is
supported by all toolchains used to build edk2: GCC, Clang/LLVM, and
MSVC.

Note: Headers taken directly from external projects, such as those
in OvmfPkg/Include/IndustryStandard/Xen/ were not modified since they
may be periodically re-synced and do not follow other edk2 coding
stadards.

Compared to macro-based include guards, `#pragma once`:

- Eliminates the risk of macro name collisions or copy/paste errors
  where two headers inadvertently use the same guard macro.
- Eliminate inconsistency in the way include guard macros are named
  (e.g., some files use `__FILE_H__`, others use `FILE_H_`, etc.).
- Reduces boilerplate (three lines replaced by one).
- Avoids polluting the macro namespace with guard symbols.
- Can improve build times as the preprocessor can skip re-opening the
  file entirely, rather than re-reading it to find the matching
  `#endif` ("multiple-include optimization").
  - Note that some compilers may already optimize traditional include
    guards, by recognzining the idiomatic pattern.

This change is made acknowledging that overall portability of the
code will technically be reduced, as `#pragma once` is not part of the
C/C++ standards.

However, this is considered acceptable given:

1. edk2 already defines a subset of supported compilers in
   BaseTools/Conf/tools_def.template, all of which have supported
   `#pragma once` for over two decades.
2. There have been concerns raised to the project about inconsistent
   include guard naming and potential macro collisions.

Approximate compiler support dates:

- MSVC: Supported since Visual C++ 4.2 (1996)
- GCC: Supported since 3.4 (2004)
  (http://gnu.ist.utl.pt/software/gcc/gcc-3.4/changes.html)
- Clang (LLVM based): Since initial release in 2007

Signed-off-by: Michael Kubacki &lt;michael.kubacki@microsoft.com&gt;
</content>
</entry>
<entry>
<title>OvmfPkg/MemEncryptSevLib: Check if SEV-SNP coherency mitigitation is needed</title>
<updated>2025-09-09T17:43:31+00:00</updated>
<author>
<name>Tom Lendacky</name>
<email>thomas.lendacky@amd.com</email>
</author>
<published>2025-07-22T20:06:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=20f24c0f67b3364cd590e1eea470f74be40e7710'/>
<id>urn:sha1:20f24c0f67b3364cd590e1eea470f74be40e7710</id>
<content type='text'>
CPUID bit Fn8000001F_EBX[31] defines the COHERNECY_SFW_NO CPUID bit that,
when set, indicates that the software mitigation for this vulnerability is
not needed.

Add support to check for this CPUID bit and avoid the mitigation if set.

Signed-off-by: Tom Lendacky &lt;thomas.lendacky@amd.com&gt;
</content>
</entry>
<entry>
<title>OvmfPkg/MemEncryptSevLib: Evict cache lines during SNP memory validation</title>
<updated>2025-09-09T17:43:31+00:00</updated>
<author>
<name>Tom Lendacky</name>
<email>thomas.lendacky@amd.com</email>
</author>
<published>2025-08-12T19:43:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=3b0d834db286a236fd22c41923fc271fc44ead5f'/>
<id>urn:sha1:3b0d834db286a236fd22c41923fc271fc44ead5f</id>
<content type='text'>
An SNP cache coherency vulnerability may require a mitigation to evict
cache lines after memory has been validated. Perform this mitigation
after having validated memory.

CVE-2024-36331

Signed-off-by: Michael Roth &lt;michael.roth@amd.com&gt;
Co-developed-by: Tom Lendacky &lt;thomas.lendacky@amd.com&gt;
Signed-off-by: Tom Lendacky &lt;thomas.lendacky@amd.com&gt;</content>
</entry>
<entry>
<title>OvmfPkg/BaseMemEncryptLib: Check for presence of an SVSM when not at VMPL0</title>
<updated>2024-04-17T20:04:41+00:00</updated>
<author>
<name>Tom Lendacky</name>
<email>thomas.lendacky@amd.com</email>
</author>
<published>2024-03-08T15:33:01+00:00</published>
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<id>urn:sha1:0afb8743493853e30171f6000de51242e22a1eb8</id>
<content type='text'>
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

Currently, an SEV-SNP guest will terminate if it is not running at VMPL0.
The requirement for running at VMPL0 is removed if an SVSM is present.

Update the current VMPL0 check to additionally check for the presence of
an SVSM is the guest is not running at VMPL0.

Cc: Ard Biesheuvel &lt;ardb+tianocore@kernel.org&gt;
Cc: Erdem Aktas &lt;erdemaktas@google.com&gt;
Cc: Gerd Hoffmann &lt;kraxel@redhat.com&gt;
Cc: Jiewen Yao &lt;jiewen.yao@intel.com&gt;
Cc: Laszlo Ersek &lt;lersek@redhat.com&gt;
Cc: Michael Roth &lt;michael.roth@amd.com&gt;
Cc: Min Xu &lt;min.m.xu@intel.com&gt;
Acked-by: Gerd Hoffmann &lt;kraxel@redhat.com&gt;
Signed-off-by: Tom Lendacky &lt;thomas.lendacky@amd.com&gt;
</content>
</entry>
<entry>
<title>OvmfPkg/BaseMemEncryptSevLib: Maximize Page State Change efficiency</title>
<updated>2024-04-17T20:04:41+00:00</updated>
<author>
<name>Tom Lendacky</name>
<email>thomas.lendacky@amd.com</email>
</author>
<published>2024-03-08T15:32:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=18fdffe825683df40d7a4a9eba11b8630bcef050'/>
<id>urn:sha1:18fdffe825683df40d7a4a9eba11b8630bcef050</id>
<content type='text'>
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

Similar to the Page State Change optimization added previously, also take
into account the possiblity of using the SVSM for PVALIDATE instructions.
Conditionally adjust the maximum number of entries based on how many
entries the SVSM calling area can support.

Cc: Ard Biesheuvel &lt;ardb+tianocore@kernel.org&gt;
Cc: Erdem Aktas &lt;erdemaktas@google.com&gt;
Cc: Gerd Hoffmann &lt;kraxel@redhat.com&gt;
Cc: Jiewen Yao &lt;jiewen.yao@intel.com&gt;
Cc: Laszlo Ersek &lt;lersek@redhat.com&gt;
Cc: Michael Roth &lt;michael.roth@amd.com&gt;
Cc: Min Xu &lt;min.m.xu@intel.com&gt;
Acked-by: Gerd Hoffmann &lt;kraxel@redhat.com&gt;
Signed-off-by: Tom Lendacky &lt;thomas.lendacky@amd.com&gt;
</content>
</entry>
<entry>
<title>OvmfPkg/BaseMemEncryptSevLib: Use AmdSvsmSnpPvalidate() to validate pages</title>
<updated>2024-04-17T20:04:41+00:00</updated>
<author>
<name>Tom Lendacky</name>
<email>thomas.lendacky@amd.com</email>
</author>
<published>2024-03-08T15:32:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=f6bf37c1711c07709b0817a996c5b5a97f263bdd'/>
<id>urn:sha1:f6bf37c1711c07709b0817a996c5b5a97f263bdd</id>
<content type='text'>
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

The PVALIDATE instruction is used to change the SNP validation of a page,
but that can only be done when running at VMPL0. To prepare for running at
a less priviledged VMPL, use the AmdSvsmLib library API to perform the
PVALIDATE. The AmdSvsmLib library will perform the proper operation on
behalf of the caller.

Cc: Ard Biesheuvel &lt;ardb+tianocore@kernel.org&gt;
Cc: Erdem Aktas &lt;erdemaktas@google.com&gt;
Cc: Gerd Hoffmann &lt;kraxel@redhat.com&gt;
Cc: Jiewen Yao &lt;jiewen.yao@intel.com&gt;
Cc: Laszlo Ersek &lt;lersek@redhat.com&gt;
Cc: Michael Roth &lt;michael.roth@amd.com&gt;
Cc: Min Xu &lt;min.m.xu@intel.com&gt;
Signed-off-by: Tom Lendacky &lt;thomas.lendacky@amd.com&gt;
Acked-by: Gerd Hoffmann &lt;kraxel@redhat.com&gt;
</content>
</entry>
<entry>
<title>OvmfPkg/BaseMemEncryptSevLib: Maximize Page State Change efficiency</title>
<updated>2024-04-17T18:30:03+00:00</updated>
<author>
<name>Tom Lendacky</name>
<email>thomas.lendacky@amd.com</email>
</author>
<published>2024-03-08T15:31:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=069f9911a35c6191ea0cace0b5b5c8061e9b7720'/>
<id>urn:sha1:069f9911a35c6191ea0cace0b5b5c8061e9b7720</id>
<content type='text'>
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

When building the Page State Change entries for a range of memory, it can
happen that multiple calls to BuildPageStateBuffer() need to be made. If
the size of the input work area passed to BuildPageStateBuffer() exceeds
the number of entries that can be passed to the hypervisor using the GHCB
shared buffer, the Page State Change VMGEXIT support will issue multiple
VMGEXITs to process all entries in the buffer.

However, it could be that the final VMGEXIT for each round of Page State
Changes is only for a small number of entries and subsequent VMGEXITs may
still be issued to handle the full range of memory requested. To maximize
the number of entries processed during the Page State Change VMGEXIT,
limit BuildPageStateBuffer() to not build entries that exceed the maximum
number of entries that can be handled in a single Page State Change
VMGEXIT.

Cc: Ard Biesheuvel &lt;ardb+tianocore@kernel.org&gt;
Cc: Erdem Aktas &lt;erdemaktas@google.com&gt;
Cc: Gerd Hoffmann &lt;kraxel@redhat.com&gt;
Cc: Jiewen Yao &lt;jiewen.yao@intel.com&gt;
Cc: Laszlo Ersek &lt;lersek@redhat.com&gt;
Cc: Michael Roth &lt;michael.roth@amd.com&gt;
Cc: Min Xu &lt;min.m.xu@intel.com&gt;
Reviewed-by: Gerd Hoffmann &lt;kraxel@redhat.com&gt;
Signed-off-by: Tom Lendacky &lt;thomas.lendacky@amd.com&gt;
</content>
</entry>
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