Tianocore/edk2.git/MdePkg/Library/BaseSynchronizationLib, branch dependabot/github_actions/actions/github-script-8

MdePkg: Remove ARM32 Support from BaseSynchronizationLib

2025-09-25T22:04:10+00:00

edk2 is dropping support for the ARM32 architecture. This commit removes ARM32 code from BaseSynchronizationLib. Signed-off-by: Oliver Smith-Denny

BaseSynchronizationLib: Fix LoongArch64 synchronization functions

2023-05-05T13:10:09+00:00

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4432 There is a return value bug: The sc.w/sc.d instruction will destroy the reg_t0, use reg_t1 to avoid context reg_t0 being corrupted. Adjust Check that ptr align is UINT16. Optimize function SyncIncrement and SyncDecrement. Cc: Michael D Kinney Cc: Liming Gao Cc: Zhiguang Liu Cc: Chao Li Signed-off-by: Dongyan Qian Reviewed-by: Chao Li

MdePkg/BaseSynchronizationLib AARCH64: Make asm files BTI compatible

2023-03-30T11:05:22+00:00

Add the BTI instructions and the associated note to make the AArch64 asm objects compatible with BTI enforcement. Signed-off-by: Ard Biesheuvel Reviewed-by: Leif Lindholm Reviewed-by: Oliver Smith-Denny

BaseSynchronizationLib: Fix RISC-V helper name

2022-11-29T09:53:15+00:00

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4143 Fix the name of InternalSyncCompareExchange64() function. Signed-off-by: Sunil V L Reported-by: Zhihao Li Tested-by: Zhihao Li Cc: Michael D Kinney Cc: Liming Gao Cc: Zhiguang Liu Cc: Daniel Schaefer Reviewed-by: Liming Gao

MdePkg/BaseSynchronizationLib: LoongArch cache related code.

2022-10-14T02:16:33+00:00

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053 Support LoongArch cache related functions. Cc: Michael D Kinney Cc: Liming Gao Cc: Zhiguang Liu Signed-off-by: Chao Li Co-authored-by: Baoqi Zhang Reviewed-by: Michael D Kinney

MdePkg: Remove RVCT support

2022-05-13T14:58:54+00:00

RVCT is obsolete and no longer used. Remove support for it. Signed-off-by: Rebecca Cran Reviewed-by: Ard Biesheuvel

MdePkg: Apply uncrustify changes

2021-12-07T17:24:28+00:00

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737 Apply uncrustify changes to .c/.h files in the MdePkg package Cc: Andrew Fish Cc: Leif Lindholm Cc: Michael D Kinney Signed-off-by: Michael Kubacki Reviewed-by: Liming Gao

MdePkg/BaseSynchronizationLib: RISC-V cache related code.

2020-05-07T03:17:15+00:00

Support RISC-V cache related functions. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672 Signed-off-by: Abner Chang Co-authored-by: Gilbert Chen Reviewed-by: Leif Lindholm Reviewed-by: Zhiguang Liu Reviewed-by: Liming Gao Cc: Michael D Kinney Cc: Liming Gao Cc: Leif Lindholm Cc: Gilbert Chen

MdePkg: Replace BSD License with BSD+Patent License

2019-04-09T17:58:13+00:00

https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney Reviewed-by: Liming Gao

MdePkg/BaseSynchronizationLib: Fix InternalSync[De|In]crement

2018-11-08T02:00:05+00:00

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1303 Today's code generates assembly code as below for InternalSyncIncrement: __asm__ __volatile__ ( "movl $1, %%eax \n\t" "lock \n\t" "xadd %%eax, %1 \n\t" "inc %%eax \n\t" : "=a" (Result), // %0 "+m" (*Value) // %1 : // no inputs that aren't also outputs : "memory", "cc" ); 0: 55 pushl %ebp 1: 89 e5 movl %esp, %ebp 3: 8b 45 08 movl 8(%ebp), %eax 6: b8 01 00 00 00 movl $1, %eax b: f0 lock c: 0f c1 00 xaddl %eax, _InternalSyncIncrement(%eax) f: 40 incl %eax 10: 5d popl %ebp 11: c3 retl Line #3 and Line #6 both use EAX as destination register. Line #c uses EAX and (EAX). The output operand "=a" tells GCC that EAX is used for output. But GCC only assumes that EAX will be used in the very last instruction. Per GCC document, "Use the '&' constraint modifier on all output operands that must not overlap an input. Otherwise, GCC may allocate the output operand in the same register as an unrelated input operand, on the assumption that the assembler code consumes its inputs before producing outputs. This assumption may be false if the assembler code actually consists of more than one instruction." "=&a" should be used to tell GCC not use EAX before the assembly. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni Cc: Liming Gao Cc: Michael Kinney Cc: Laszlo Ersek Cc: Philippe Mathieu-Daudé Cc: Ard Biesheuvel Reviewed-by: Laszlo Ersek Tested-by: Laszlo Ersek Suggested-by: Ard Biesheuvel Fixes: 8a94eb9283fa09a30f5f06f0c12cf0ee4e14fbcf Fixes: 17634d026f968c404b039a8d8431b6389dd396ea