<feed xmlns='http://www.w3.org/2005/Atom'>
<title>Tianocore/edk2.git/MdePkg/Library/BaseRngLib, branch dependabot/github_actions/actions/setup-python-7</title>
<subtitle>EDK II (mirror)</subtitle>
<id>https://git.radix-linux.su/Tianocore/edk2.git/atom?h=dependabot%2Fgithub_actions%2Factions%2Fsetup-python-7</id>
<link rel='self' href='https://git.radix-linux.su/Tianocore/edk2.git/atom?h=dependabot%2Fgithub_actions%2Factions%2Fsetup-python-7'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/'/>
<updated>2026-03-11T11:56:52+00:00</updated>
<entry>
<title>MdePkg/BaseRngLib: Rename Riscv folder to RiscV</title>
<updated>2026-03-11T11:56:52+00:00</updated>
<author>
<name>Sunil V L</name>
<email>sunilvl@oss.qualcomm.com</email>
</author>
<published>2026-03-09T13:19:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=3517a8363976f7e178249a593f01399437192bea'/>
<id>urn:sha1:3517a8363976f7e178249a593f01399437192bea</id>
<content type='text'>
To keep folder name consistent for RISC-V specific code, rename it to
RiscV and update the INF file to reflect it. Since review notifications
depend on the folder name, the naming should be consistent.

Signed-off-by: Sunil V L &lt;sunilvl@oss.qualcomm.com&gt;
</content>
</entry>
<entry>
<title>MdePkg: Replace include guards with #pragma once</title>
<updated>2026-02-23T21:01:28+00:00</updated>
<author>
<name>Michael Kubacki</name>
<email>michael.kubacki@microsoft.com</email>
</author>
<published>2026-02-03T18:54:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=7835e5802a2a70984333c054002e449bfd1f0a0d'/>
<id>urn:sha1:7835e5802a2a70984333c054002e449bfd1f0a0d</id>
<content type='text'>
Replace traditional `#ifndef`/`#define`/`#endif` include guards with
`#pragma` once.

`#pragma once` is a widely supported preprocessor directive that
prevents header files from being included multiple times. It is
supported by all toolchains used to build edk2: GCC, Clang/LLVM, and
MSVC.

Compared to macro-based include guards, `#pragma once`:

- Eliminates the risk of macro name collisions or copy/paste errors
  where two headers inadvertently use the same guard macro.
- Eliminate inconsistency in the way include guard macros are named
  (e.g., some files use `__FILE_H__`, others use `FILE_H_`, etc.).
- Reduces boilerplate (three lines replaced by one).
- Avoids polluting the macro namespace with guard symbols.
- Can improve build times as the preprocessor can skip re-opening the
  file entirely, rather than re-reading it to find the matching
  `#endif` ("multiple-include optimization").
  - Note that some compilers may already optimize traditional include
    guards, by recognzining the idiomatic pattern.

This change is made acknowledging that overall portability of the
code will technically be reduced, as `#pragma once` is not part of the
C/C++ standards.

However, this is considered acceptable given:

1. edk2 already defines a subset of supported compilers in
   BaseTools/Conf/tools_def.template, all of which have supported
   `#pragma once` for over two decades.
2. There have been concerns raised to the project about inconsistent
   include guard naming and potential macro collisions.

Approximate compiler support dates:

- MSVC: Supported since Visual C++ 4.2 (1996)
- GCC: Supported since 3.4 (2004)
  (http://gnu.ist.utl.pt/software/gcc/gcc-3.4/changes.html)
- Clang (LLVM based): Since initial release in 2007

Signed-off-by: Michael Kubacki &lt;michael.kubacki@microsoft.com&gt;
</content>
</entry>
<entry>
<title>MdePkg: Add LoongArch64 instance in BaseRngLib</title>
<updated>2026-01-13T05:31:57+00:00</updated>
<author>
<name>Chao Li</name>
<email>lichao@loongson.cn</email>
</author>
<published>2026-01-09T01:42:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=6696ff97b5bfb3ae2fbb5656f5f7e292b4785809'/>
<id>urn:sha1:6696ff97b5bfb3ae2fbb5656f5f7e292b4785809</id>
<content type='text'>
LoongArch64 currently dose not support HW or a standards-compliant RNG.
Read the stable time twice performs an XOR, and then use xorshift
algorithm(from Marsaglia's xorshift generator) to generate a
pseudo-random number.

It's not random enough, but it's definitely better than just using a
timer(BaseRngLibTimerLib).

Signed-off-by: Chao Li &lt;lichao@loongson.cn&gt;
Cc: Michael D Kinney &lt;michael.d.kinney@intel.com&gt;
Cc: Liming Gao &lt;gaoliming@byosoft.com.cn&gt;
</content>
</entry>
<entry>
<title>MdePkg/Library/BaseRngLib/Riscv: use CPU RNG instructions only</title>
<updated>2025-09-02T08:28:30+00:00</updated>
<author>
<name>Adriano Cordova</name>
<email>adriano.cordova@canonical.com</email>
</author>
<published>2025-04-22T19:09:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=2efffed93811a7c5d0e6d7d19f8ff112128ffd6a'/>
<id>urn:sha1:2efffed93811a7c5d0e6d7d19f8ff112128ffd6a</id>
<content type='text'>
Generate random number using risc-v CPU RNG instructions only,
as for the other architectures. This is safer than using Mersenne
Twister from a seed, which is the current implementation, as the
latter is known to be cryptographically unsafe (e.g. see
https://www.schutzwerk.com/en/blog/attacking-a-rng/)

Signed-off-by: Adriano Cordova &lt;adriano.cordova@canonical.com&gt;
</content>
</entry>
<entry>
<title>MdePkg: Correct spelling errors and typos</title>
<updated>2025-07-04T01:41:47+00:00</updated>
<author>
<name>Abdul Lateef Attar</name>
<email>AbdulLateef.Attar@amd.com</email>
</author>
<published>2025-07-01T09:10:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=0eae93e07c725e2970ed9589af4df94ed6bfe467'/>
<id>urn:sha1:0eae93e07c725e2970ed9589af4df94ed6bfe467</id>
<content type='text'>
Signed-off-by: Abdul Lateef Attar &lt;AbdulLateef.Attar@amd.com&gt;
</content>
</entry>
<entry>
<title>MdePkg: Centralize RNDR Register Definition</title>
<updated>2025-02-07T02:23:11+00:00</updated>
<author>
<name>Oliver Smith-Denny</name>
<email>osde@microsoft.com</email>
</author>
<published>2025-01-14T23:55:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=d9715c133f45b6eee239f4aa58e9112b7497de4b'/>
<id>urn:sha1:d9715c133f45b6eee239f4aa58e9112b7497de4b</id>
<content type='text'>
RNDR is a standard register defined in the ARM ARM for
AARCH64. Move the definition from BaseRngLib to AArch64.h.

Furthermore, move the inclusion of this register definition
to the ARM specific header file.

Signed-off-by: Oliver Smith-Denny &lt;osde@microsoft.com&gt;
</content>
</entry>
<entry>
<title>MdePkg/BaseRngLib: Remove global variable for RDRAND state update</title>
<updated>2024-11-22T17:11:25+00:00</updated>
<author>
<name>Phil Noh</name>
<email>Phil.Noh@amd.com</email>
</author>
<published>2024-11-21T16:05:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=edb312d5d0f00685e75639b8607d54c93d47aca8'/>
<id>urn:sha1:edb312d5d0f00685e75639b8607d54c93d47aca8</id>
<content type='text'>
As a BASE type library, some PEI drivers could link and use it.
Tcg2Pei.inf is an example. On edk2-stable202408 version, PEI drivers
that link the library include the global variable of mRdRandSupported.
The previous commit (c3a8ca7) that refers to the global variable actually
is found to influence the link status. Updating the global variable
in PEI drivers could affect the following issues.

PEI ROM Boot : Global variable is not updated
PEI RAM Boot : PEI FV integration/security check is failed

To address these issues, remove the global variable usage.

Signed-off-by: Phil Noh &lt;Phil.Noh@amd.com&gt;
</content>
</entry>
<entry>
<title>MdePkg/BaseRngLib: Prefer ArmReadIdAA64Isar0Reg() over ArmReadIdIsar0()</title>
<updated>2024-08-01T13:41:01+00:00</updated>
<author>
<name>Pierre Gondois</name>
<email>pierre.gondois@arm.com</email>
</author>
<published>2023-10-04T12:27:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=1715d672310a318ce441d27a3515d371329f8b5b'/>
<id>urn:sha1:1715d672310a318ce441d27a3515d371329f8b5b</id>
<content type='text'>
A ArmReadIdAA64Isar0Reg() function was recently added
to BaseLib. Use it instead of its ArmReadIdIsar0() equivalent,
which was private to the BaseRngLib library.

This also allows to avoid the confusion between the following
registers:
- ID_ISAR0_EL1: allows to probe for Divide instructions, Debug
  instructions, ...
- ID_AA64ISAR0_EL1: AARCH64 specific register allowing to probe
  for AESE, RNDR, ... instructions

Signed-off-by: Pierre Gondois &lt;pierre.gondois@arm.com&gt;
</content>
</entry>
<entry>
<title>MdePkg/Library: Add RISCV64 support to BaseRngLib</title>
<updated>2024-07-15T04:05:56+00:00</updated>
<author>
<name>Dhaval</name>
<email>dhaval@rivosinc.com</email>
</author>
<published>2024-06-20T12:12:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=b54bc983c6102a59c9e0472dd0406ac9ccbaa0bf'/>
<id>urn:sha1:b54bc983c6102a59c9e0472dd0406ac9ccbaa0bf</id>
<content type='text'>
The ratified RISC-V crypto scalar extensions provide entropy bits via the
seed CSR, as exposed by the Zkr extension. The Zkr extension is ratified
and provides 16 bits of entropy seed when reading the SEED CSR.
Guarded by a RISCV64 Feature PCD, 64-bit random numbers can be
accumulated from the `seed` CSR. This driver is based on the driver in
the Linux kernel.

Cc: Liming Gao &lt;gaoliming@byosoft.com.cn&gt;
Cc: Michael D Kinney &lt;michael.d.kinney@intel.com&gt;
Cc: Zhiguang Liu &lt;zhiguang.liu@intel.com&gt;
Signed-off-by: Dhaval Sharma &lt;dhaval@rivosinc.com&gt;
Co-authored-by: Tim Wawrzynczak &lt;tim@rivosinc.com&gt;
</content>
</entry>
<entry>
<title>MdePkg/BaseRngLib: Add a smoketest for RDRAND and check CPUID</title>
<updated>2024-06-13T15:52:48+00:00</updated>
<author>
<name>Pedro Falcato</name>
<email>pedro.falcato@gmail.com</email>
</author>
<published>2022-11-22T22:31:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=c3a8ca7b54a9fd17acdf16c6282a92cc989fa92a'/>
<id>urn:sha1:c3a8ca7b54a9fd17acdf16c6282a92cc989fa92a</id>
<content type='text'>
RDRAND has notoriously been broken many times over its lifespan.
Add a smoketest to RDRAND, in order to better sniff out potential
security concerns.

Also add a proper CPUID test in order to support older CPUs which may
not have it; it was previously being tested but then promptly ignored.

Testing algorithm inspired by linux's arch/x86/kernel/cpu/rdrand.c
:x86_init_rdrand() per commit 049f9ae9..

Many thanks to Jason Donenfeld for relicensing his linux RDRAND detection
code to MIT and the public domain.

&gt;On Tue, Nov 22, 2022 at 2:21 PM Jason A. Donenfeld &lt;Jason@zx2c4.com&gt; wrote:
  &lt;..&gt;
&gt;    I (re)wrote that function in Linux. I hereby relicense it as MIT, and
&gt;    also place it into public domain. Do with it what you will now.
&gt;
&gt;    Jason

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4163

Signed-off-by: Pedro Falcato &lt;pedro.falcato@gmail.com&gt;
Cc: Michael D Kinney &lt;michael.d.kinney@intel.com&gt;
Cc: Liming Gao &lt;gaoliming@byosoft.com.cn&gt;
Cc: Zhiguang Liu &lt;zhiguang.liu@intel.com&gt;
Cc: Jason A. Donenfeld &lt;Jason@zx2c4.com&gt;
</content>
</entry>
</feed>
