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<title>Tianocore/edk2.git/MdePkg/Library/BaseLib/BaseLib.inf, branch master</title>
<subtitle>EDK II (mirror)</subtitle>
<id>https://git.radix-linux.su/Tianocore/edk2.git/atom?h=master</id>
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<updated>2026-03-12T06:51:54+00:00</updated>
<entry>
<title>MdePkg/BaseLib: Add AsmReadFsBase and AsmWriteFsBase for X86-64</title>
<updated>2026-03-12T06:51:54+00:00</updated>
<author>
<name>Ray Ni</name>
<email>ray.ni@intel.com</email>
</author>
<published>2026-03-11T02:57:55+00:00</published>
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<id>urn:sha1:e2b0e207f7b1009a6729f7973ed17242cb6672a4</id>
<content type='text'>
Signed-off-by: Ray Ni &lt;ray.ni@intel.com&gt;
</content>
</entry>
<entry>
<title>MdePkg/Library/BaseLib: Use PcdControlFlowEnforcementPropertyMask as fixed</title>
<updated>2025-12-24T05:43:01+00:00</updated>
<author>
<name>Michael D Kinney</name>
<email>michael.d.kinney@intel.com</email>
</author>
<published>2025-12-21T18:54:39+00:00</published>
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<id>urn:sha1:1e1edf4d6cd41f6539808c85cc5220f211a4206f</id>
<content type='text'>
Always access PcdControlFlowEnforcementPropertyMask using
FixedPcdGet() in NASM source files and update INFs to correctly
declare that PcdControlFlowEnforcementPropertyMask is always
accessed as a Fixed PCD.

PcdControlFlowEnforcementPropertyMask is declared in MdePkg.dec
in the [PcdsFixedAtBuild] section, so this PCD does not support
any other PCD access types.

This change resolves ld warnings from GCC and CLANGDWARF builds
for relocations in read-only text sections because use of PcdGet()
in NASM source files reads the value into eax from the memory
location of a const global variable that requires a relocation
fixup.

By changing PcdGet() to FixedPcdGet(), eax is loaded with an
immediate value known at build time and no relocation fixups for
PcdControlFlowEnforcementPropertyMask are required.

Signed-off-by: Michael D Kinney &lt;michael.d.kinney@intel.com&gt;
</content>
</entry>
<entry>
<title>MdePkg/BaseLib AARCH64: Drop special Unaligned.c version</title>
<updated>2025-12-09T08:41:08+00:00</updated>
<author>
<name>Ard Biesheuvel</name>
<email>ardb@kernel.org</email>
</author>
<published>2025-12-05T15:32:31+00:00</published>
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<id>urn:sha1:3e7107c7da655b0b65425ba99f066366b5b7a230</id>
<content type='text'>
Now that the generic code takes alignment constraints into account,
there is no longer a need for a special AArch64 version that performs
byte by byte access in C.

Signed-off-by: Ard Biesheuvel &lt;ardb@kernel.org&gt;
</content>
</entry>
<entry>
<title>MdePkg: Add code to detect running as an SEV guest</title>
<updated>2025-11-04T06:51:50+00:00</updated>
<author>
<name>RARelph</name>
<email>44270374+RARelph@users.noreply.github.com</email>
</author>
<published>2025-10-30T22:02:27+00:00</published>
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<id>urn:sha1:b98ccecdecec0bb768e6e5bd4df1694de87ad42f</id>
<content type='text'>
Similar to Intel's Tdx, we need a mechanism to detect running as
an AMD SEV guest that will work in all phases everywhere. This
will be immediately used to prevent usage of MTRRs with SEV guests.

Signed-off-by: Richard Relph &lt;richard.relph@amd.com&gt;
</content>
</entry>
<entry>
<title>MdePkg: Remove ARM32 Support from BaseLib</title>
<updated>2025-09-25T22:04:10+00:00</updated>
<author>
<name>Oliver Smith-Denny</name>
<email>osde@microsoft.com</email>
</author>
<published>2025-09-15T21:08:25+00:00</published>
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<id>urn:sha1:49b3eb5907f1a1c17b202cb2195da6fff59ca7dc</id>
<content type='text'>
edk2 is dropping support for the ARM32 architecture. This
commit removes ARM32 code from BaseLib.

Signed-off-by: Oliver Smith-Denny &lt;osde@microsoft.com&gt;
</content>
</entry>
<entry>
<title>MdePkg/Library/BaseLib: Remove __chkstk() from BaseLib</title>
<updated>2025-09-19T07:14:26+00:00</updated>
<author>
<name>Michael D Kinney</name>
<email>michael.d.kinney@intel.com</email>
</author>
<published>2025-09-16T20:41:25+00:00</published>
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<id>urn:sha1:d87583e720ae816c6f81617e54f28b1366301296</id>
<content type='text'>
Remove workaround for GCC compilers that is no longer
required. Keeping this implementation of __chkstk() generates
duplicate symbol build failures with Windows/CLANGPDB builds
host-based unit test builds.

Signed-off-by: Michael D Kinney &lt;michael.d.kinney@intel.com&gt;
</content>
</entry>
<entry>
<title>MdePkg: BaseLib: Add UUID-GUID conversion function</title>
<updated>2025-06-05T05:01:57+00:00</updated>
<author>
<name>Kun Qin</name>
<email>kuqin@microsoft.com</email>
</author>
<published>2025-04-24T23:57:44+00:00</published>
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<id>urn:sha1:6ec73a6c95de6473c70661f2a9d8793dc1358777</id>
<content type='text'>
With interactions between Standalone MM partitions and normal UEFI
environment, there is constant need to convert UUID to GUID and back.

This change added 2 new interfaces to BaseLib that support such usage.

Signed-off-by: Kun Qin &lt;kun.qin@microsoft.com&gt;
</content>
</entry>
<entry>
<title>MdePkg/BaseLib: Add NULL version Tdx functions for other architectures</title>
<updated>2024-09-09T02:57:02+00:00</updated>
<author>
<name>Ceping Sun</name>
<email>cepingx.sun@intel.com</email>
</author>
<published>2024-08-30T01:21:48+00:00</published>
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<id>urn:sha1:043615ae8b0df9635b509643fe1d5cedb6e1a64d</id>
<content type='text'>
Currently, the NULL version Tdx functions are only built for Ia32.
In BaseLib, the others architectures also need such NULL version
Tdx functions.

Cc: Liming Gao &lt;gaoliming@byosoft.com.cn&gt;
Cc: Michael D Kinney &lt;michael.d.kinney@intel.com&gt;
Cc: Zhiguang Liu &lt;zhiguang.liu@intel.com&gt;
Cc: Gerd Hoffmann &lt;kraxel@redhat.com&gt;
Cc: Jiewen Yao &lt;jiewen.yao@intel.com&gt;
Cc: Min Xu &lt;min.m.xu@intel.com&gt;
Signed-off-by: Ceping Sun &lt;cepingx.sun@intel.com&gt;
</content>
</entry>
<entry>
<title>MdePkg/BaseLib: AARCH64: Add ArmReadIdAA64Isar0Reg()</title>
<updated>2024-08-01T13:41:01+00:00</updated>
<author>
<name>Pierre Gondois</name>
<email>pierre.gondois@arm.com</email>
</author>
<published>2023-10-04T12:26:05+00:00</published>
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<id>urn:sha1:30e53f8b5efe0112eda7014cf846007fb0fb425f</id>
<content type='text'>
To enable AARCH64 native instruction support for Openssl,
some interfaces must be implemented. OPENSSL_cpuid_setup()
allows to probe the supported features of the platform.

Add ArmReadIdAA64Isar0Reg() to read the AA64Isar0, containing
Arm64 instruction capabilities.
A similar ArmReadIdAA64Isar0() function is available in the ArmPkg,
but the CryptoPkg where OPENSSL_cpuid_setup will reside cannot rely
on the ArmPkg.

Signed-off-by: Pierre Gondois &lt;pierre.gondois@arm.com&gt;
</content>
</entry>
<entry>
<title>MdePkg/BaseLib: AARCH64: Add ArmReadCntPctReg()</title>
<updated>2024-08-01T13:41:01+00:00</updated>
<author>
<name>Pierre Gondois</name>
<email>pierre.gondois@arm.com</email>
</author>
<published>2023-11-02T12:53:54+00:00</published>
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<id>urn:sha1:a72d93e1631852b19e2a996fa5fa81109d5c25f4</id>
<content type='text'>
To enable AARCH64 native instruction support for Openssl,
some interfaces must be implemented. OPENSSL_rdtsc() requests
an access to a counter to get some non-trusted entropy.

Add ArmReadCntPctReg() to read system count.
A similar ArmReadCntPct() function is available in the ArmPkg,
but the CryptoPkg where OPENSSL_rdtsc will reside cannot rely
on the ArmPkg.

Signed-off-by: Pierre Gondois &lt;Pierre.Gondois@arm.com&gt;
</content>
</entry>
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