<feed xmlns='http://www.w3.org/2005/Atom'>
<title>Tianocore/edk2.git/MdePkg/Library/BaseCacheMaintenanceLib/RiscVCache.c, branch master</title>
<subtitle>EDK II (mirror)</subtitle>
<id>https://git.radix-linux.su/Tianocore/edk2.git/atom?h=master</id>
<link rel='self' href='https://git.radix-linux.su/Tianocore/edk2.git/atom?h=master'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/'/>
<updated>2023-12-19T12:48:14+00:00</updated>
<entry>
<title>MdePkg: Utilize Cache Management Operations Implementation For RISC-V</title>
<updated>2023-12-19T12:48:14+00:00</updated>
<author>
<name>Dhaval Sharma</name>
<email>dhaval@rivosinc.com</email>
</author>
<published>2023-12-13T14:59:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=904b002c505cc689a2075745e1de529da5895c41'/>
<id>urn:sha1:904b002c505cc689a2075745e1de529da5895c41</id>
<content type='text'>
Use newly defined cache management operations for RISC-V where possible
It builds up on the support added for RISC-V cache management
instructions in BaseLib.
Cc: Michael D Kinney &lt;michael.d.kinney@intel.com&gt;
Cc: Liming Gao &lt;gaoliming@byosoft.com.cn&gt;
Cc: Zhiguang Liu &lt;zhiguang.liu@intel.com&gt;
Cc: Laszlo Ersek &lt;lersek@redhat.com&gt;
Cc: Pedro Falcato &lt;pedro.falcato@gmail.com&gt;

Signed-off-by: Dhaval Sharma &lt;dhaval@rivosinc.com&gt;
Acked-by: Laszlo Ersek &lt;lersek@redhat.com&gt;
Reviewed-by: Pedro Falcato &lt;pedro.falcato@gmail.com&gt;
Reviewed-by: Sunil V L &lt;sunilvl@ventanamicro.com&gt;
</content>
</entry>
<entry>
<title>MdePkg: Rename Cache Management Function To Clarify Fence Based Op</title>
<updated>2023-12-19T12:48:14+00:00</updated>
<author>
<name>Dhaval</name>
<email>dhaval@rivosinc.com</email>
</author>
<published>2023-12-13T14:59:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=30faafd0247af0a6534caf2a6ac3231fa8e63d86'/>
<id>urn:sha1:30faafd0247af0a6534caf2a6ac3231fa8e63d86</id>
<content type='text'>
There are different ways to manage cache on RISC-V Processors.
One way is to use fence instruction. Another way is to use CPU
specific cache management operation instructions ratified as
per RISC-V ISA specifications to be introduced in future
patches. Current method is fence instruction based, rename the
function accordingly to add that clarity.

Cc: Michael D Kinney &lt;michael.d.kinney@intel.com&gt;
Cc: Liming Gao &lt;gaoliming@byosoft.com.cn&gt;
Cc: Zhiguang Liu &lt;zhiguang.liu@intel.com&gt;
Cc: Sunil V L &lt;sunilvl@ventanamicro.com&gt;
Cc: Daniel Schaefer &lt;git@danielschaefer.me&gt;
Cc: Laszlo Ersek &lt;lersek@redhat.com&gt;
Cc: Pedro Falcato &lt;pedro.falcato@gmail.com&gt;

Signed-off-by: Dhaval Sharma &lt;dhaval@rivosinc.com&gt;
Reviewed-by: Laszlo Ersek &lt;lersek@redhat.com&gt;
</content>
</entry>
<entry>
<title>MdePkg: Move RISC-V Cache Management Declarations Into BaseLib</title>
<updated>2023-12-19T12:48:14+00:00</updated>
<author>
<name>Dhaval Sharma</name>
<email>dhaval@rivosinc.com</email>
</author>
<published>2023-12-13T14:59:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=286b30f517ef35ae2764f13f077f0f120372a286'/>
<id>urn:sha1:286b30f517ef35ae2764f13f077f0f120372a286</id>
<content type='text'>
The declarations for cache Management functions belong to BaseLib
instead of instance source file. This helps with further restructuring
of cache management code for RISC-V.

Cc: Michael D Kinney &lt;michael.d.kinney@intel.com&gt;
Cc: Liming Gao &lt;gaoliming@byosoft.com.cn&gt;
Cc: Zhiguang Liu &lt;zhiguang.liu@intel.com&gt;
Cc: Laszlo Ersek &lt;lersek@redhat.com&gt;
Cc: Pedro Falcato &lt;pedro.falcato@gmail.com&gt;

Signed-off-by: Dhaval Sharma &lt;dhaval@rivosinc.com&gt;
Reviewed-by: Laszlo Ersek &lt;lersek@redhat.com&gt;
</content>
</entry>
<entry>
<title>MdePkg: Update code to be more C11 compliant by using __func__</title>
<updated>2023-03-17T17:55:48+00:00</updated>
<author>
<name>Rebecca Cran</name>
<email>rebecca@quicinc.com</email>
</author>
<published>2023-02-09T14:29:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=b17a3a133b18fb41493fba7d86e9b5804ea6a8cf'/>
<id>urn:sha1:b17a3a133b18fb41493fba7d86e9b5804ea6a8cf</id>
<content type='text'>
__FUNCTION__ is a pre-standard extension that gcc and Visual C++ among
others support, while __func__ was standardized in C99.

Since it's more standard, replace __FUNCTION__ with __func__ throughout
MdePkg.

Visual Studio versions before VS 2015 don't support __func__ and so
will fail to compile. A workaround is to define __func__ as
__FUNCTION__ :

 #define __func__ __FUNCTION__

Signed-off-by: Rebecca Cran &lt;rebecca@quicinc.com&gt;
Reviewed-by: Michael D Kinney &lt;michael.d.kinney@intel.com&gt;
Reviewed-by: Sunil V L &lt;sunilvl@ventanamicro.com&gt;
</content>
</entry>
<entry>
<title>MdePkg/BaseCacheMaintenanceLib: RISC-V: Fix InvalidateInstructionCacheRange</title>
<updated>2023-03-16T15:47:40+00:00</updated>
<author>
<name>Tuan Phan</name>
<email>tphan@ventanamicro.com</email>
</author>
<published>2023-03-10T21:50:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=997c6967b00cdd797fe787567a28a7565aafd301'/>
<id>urn:sha1:997c6967b00cdd797fe787567a28a7565aafd301</id>
<content type='text'>
When the range instruction cache invalidating not supported, the whole
instruction cache should be invalidated instead.

Signed-off-by: Tuan Phan &lt;tphan@ventanamicro.com&gt;
Reviewed-by: Sunil V L &lt;sunilvl@ventanamicro.com&gt;
</content>
</entry>
<entry>
<title>MdePkg: Apply uncrustify changes</title>
<updated>2021-12-07T17:24:28+00:00</updated>
<author>
<name>Michael Kubacki</name>
<email>michael.kubacki@microsoft.com</email>
</author>
<published>2021-12-05T22:54:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=2f88bd3a1296c522317f1c21377876de63de5be7'/>
<id>urn:sha1:2f88bd3a1296c522317f1c21377876de63de5be7</id>
<content type='text'>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the MdePkg package

Cc: Andrew Fish &lt;afish@apple.com&gt;
Cc: Leif Lindholm &lt;leif@nuviainc.com&gt;
Cc: Michael D Kinney &lt;michael.d.kinney@intel.com&gt;
Signed-off-by: Michael Kubacki &lt;michael.kubacki@microsoft.com&gt;
Reviewed-by: Liming Gao &lt;gaoliming@byosoft.com.cn&gt;
</content>
</entry>
<entry>
<title>MdePkg/BaseCacheMaintenanceLib:</title>
<updated>2020-05-07T03:17:15+00:00</updated>
<author>
<name>Abner Chang</name>
<email>abner.chang@hpe.com</email>
</author>
<published>2020-04-07T07:54:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=38e72aa877253a15cb29d427f0ed38742f824bbc'/>
<id>urn:sha1:38e72aa877253a15cb29d427f0ed38742f824bbc</id>
<content type='text'>
RISC-V cache maintenance implementation.

Implement RISC-V cache maintenance functions in
BaseCacheMaintenanceLib.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672

Signed-off-by: Abner Chang &lt;abner.chang@hpe.com&gt;
Co-authored-by: Gilbert Chen &lt;gilbert.chen@hpe.com&gt;
Reviewed-by: Leif Lindholm &lt;leif.lindholm@linaro.org&gt;
Reviewed-by: Zhiguang Liu &lt;zhiguang.liu@intel.com&gt;

Cc: Michael D Kinney &lt;michael.d.kinney@intel.com&gt;
Cc: Liming Gao &lt;liming.gao@intel.com&gt;
Cc: Leif Lindholm &lt;leif.lindholm@linaro.org&gt;
Cc: Gilbert Chen &lt;gilbert.chen@hpe.com&gt;
</content>
</entry>
</feed>
