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<title>Tianocore/edk2.git/MdeModulePkg/Bus/Spi/SpiBus, branch master</title>
<subtitle>EDK II (mirror)</subtitle>
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<updated>2026-02-23T21:01:28+00:00</updated>
<entry>
<title>MdeModulePkg: Replace include guards with #pragma once</title>
<updated>2026-02-23T21:01:28+00:00</updated>
<author>
<name>Michael Kubacki</name>
<email>michael.kubacki@microsoft.com</email>
</author>
<published>2026-02-03T18:48:28+00:00</published>
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<id>urn:sha1:7a934d0befca7d10f361c76af6d2fcb6eb48c835</id>
<content type='text'>
Replace traditional `#ifndef`/`#define`/`#endif` include guards with
`#pragma` once.

`#pragma once` is a widely supported preprocessor directive that
prevents header files from being included multiple times. It is
supported by all toolchains used to build edk2: GCC, Clang/LLVM, and
MSVC.

Compared to macro-based include guards, `#pragma once`:

- Eliminates the risk of macro name collisions or copy/paste errors
  where two headers inadvertently use the same guard macro.
- Eliminate inconsistency in the way include guard macros are named
  (e.g., some files use `__FILE_H__`, others use `FILE_H_`, etc.).
- Reduces boilerplate (three lines replaced by one).
- Avoids polluting the macro namespace with guard symbols.
- Can improve build times as the preprocessor can skip re-opening the
  file entirely, rather than re-reading it to find the matching
  `#endif` ("multiple-include optimization").
  - Note that some compilers may already optimize traditional include
    guards, by recognzining the idiomatic pattern.

This change is made acknowledging that overall portability of the
code will technically be reduced, as `#pragma once` is not part of the
C/C++ standards.

However, this is considered acceptable given:

1. edk2 already defines a subset of supported compilers in
   BaseTools/Conf/tools_def.template, all of which have supported
   `#pragma once` for over two decades.
2. There have been concerns raised to the project about inconsistent
   include guard naming and potential macro collisions.

Approximate compiler support dates:

- MSVC: Supported since Visual C++ 4.2 (1996)
- GCC: Supported since 3.4 (2004)
  (http://gnu.ist.utl.pt/software/gcc/gcc-3.4/changes.html)
- Clang (LLVM based): Since initial release in 2007

Signed-off-by: Michael Kubacki &lt;michael.kubacki@microsoft.com&gt;
</content>
</entry>
<entry>
<title>MdeModulePkg/SpiBus: Free handle buffers after LocateHandleBuffer</title>
<updated>2025-06-12T14:09:13+00:00</updated>
<author>
<name>Dongyan Qian</name>
<email>qiandongyan@loongson.cn</email>
</author>
<published>2025-06-11T03:56:08+00:00</published>
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<id>urn:sha1:58d3345d8c71ce4ab1c3dbf57a08408f61c1c295</id>
<content type='text'>
Fix memory leaks by adding missing FreePool calls:
release SpiHcHandles in SpiBusEntry exit path.

REF: https://uefi.org/sites/default/files/resources/UEFI_Spec_Final_2.11.pdf
Chapter 7.3.15: "Services - Boot Services.LocateHandleBuffer":
It is the caller's responsibility to call the Boot Service.FreePool when
the caller no longer requires the contents of Buffer.

Signed-off-by: Dongyan Qian &lt;qiandongyan@loongson.cn&gt;
</content>
</entry>
<entry>
<title>MdeModulePkg SpiBus: Use correct GUID</title>
<updated>2025-04-30T06:55:42+00:00</updated>
<author>
<name>Jack Hsieh</name>
<email>v-chhsieh@microsoft.com</email>
</author>
<published>2025-04-11T07:15:54+00:00</published>
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<id>urn:sha1:e1dee2bcfa8019fed37146321ceab03281d6108c</id>
<content type='text'>
Fix incorrect guid in SpiBusDxe and add null checking for AllocateZeroPool in the SpiBus driver.

Signed-off-by: Jack Hsieh &lt;v-chhsieh@microsoft.com&gt;
</content>
</entry>
<entry>
<title>MdeModulePkg/Bus/Spi/SpiBus: Adding SpiBus Drivers</title>
<updated>2024-05-08T04:43:58+00:00</updated>
<author>
<name>Brit Chesley</name>
<email>brit.chesley@amd.com</email>
</author>
<published>2024-04-29T20:32:58+00:00</published>
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<id>urn:sha1:efc7ccf9060e69a680dfa36111131a0951d983d3</id>
<content type='text'>
Added SpiBus DXE and SMM drivers. This code translates SPI requests from
the application layer into SPI Bus transactions on the SPI host
controller. The code is responsible for checking if the transaction is
valid, then setting up the SPI clock and chip select properly before
passing the bus transaction to the host controller.

Platform Initialization Spec 1.7 volume 5 section 18.1.6

Bugzilla #4753

Cc: Abner Chang &lt;abner.chang@amd.com&gt;
Cc: Abdul Lateef Attar &lt;AbdulLateef.Attar@amd.com&gt;
Signed-off-by: Brit Chesley &lt;brit.chesley@amd.com&gt;
Reviewed-by: Abner Chang &lt;abner.chang@amd.com&gt;
</content>
</entry>
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