<feed xmlns='http://www.w3.org/2005/Atom'>
<title>Tianocore/edk2.git/IntelFsp2WrapperPkg, branch dependabot/github_actions/actions/setup-python-6</title>
<subtitle>EDK II (mirror)</subtitle>
<id>https://git.radix-linux.su/Tianocore/edk2.git/atom?h=dependabot%2Fgithub_actions%2Factions%2Fsetup-python-6</id>
<link rel='self' href='https://git.radix-linux.su/Tianocore/edk2.git/atom?h=dependabot%2Fgithub_actions%2Factions%2Fsetup-python-6'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/'/>
<updated>2025-03-05T18:21:49+00:00</updated>
<entry>
<title>IntelFsp2WrapperPkg: Bootloader need to recover fs and gs</title>
<updated>2025-03-05T18:21:49+00:00</updated>
<author>
<name>Hongbin1 Zhang</name>
<email>hongbin1.zhang@intel.com</email>
</author>
<published>2025-03-03T05:06:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=786ae7688414d58a14ef68b023af4b040f37323e'/>
<id>urn:sha1:786ae7688414d58a14ef68b023af4b040f37323e</id>
<content type='text'>
When enter FSP, bootloader need to save fs and gs, when back
to bootloader, bootloader need to restore fs and gs, so it
could avoid bootloader access wrong data segment when usging
fs and gs.

Signed-off-by: Hongbin1 Zhang &lt;hongbin1.zhang@intel.com&gt;
Cc: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Duggapu Chinni B &lt;chinni.b.duggapu@intel.com&gt;
Cc: Star Zeng &lt;star.zeng@intel.com&gt;
Cc: Ted Kuo &lt;ted.kuo@intel.com&gt;
Cc: Ashraf Ali S &lt;ashraf.ali.s@intel.com&gt;
Cc: Ray Ni &lt;ray.ni@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2WrapperPkg: Save FspHobListPtr right after FspMemoryInit exits</title>
<updated>2024-12-25T02:56:26+00:00</updated>
<author>
<name>Du Lin</name>
<email>du.lin@intel.com</email>
</author>
<published>2024-12-20T15:49:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=da6504e5ccaa233b0ec051762809905f20ca5859'/>
<id>urn:sha1:da6504e5ccaa233b0ec051762809905f20ca5859</id>
<content type='text'>
Save FspHobList pointer to HOB right after FspMemoryInit exits so that
FspHobList pointer is available when performing platform related reset
in CallFspWrapperResetSystem(). Some platforms may consume FSP HOBs
prior to performing platform related reset.

Signed-off-by: Du Lin &lt;du.lin@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2WrapperPkg/FspiWrapperPeim : Support FSP-I measurement</title>
<updated>2024-12-20T06:29:58+00:00</updated>
<author>
<name>Hongbin1 Zhang</name>
<email>hongbin1.zhang@intel.com</email>
</author>
<published>2024-10-11T11:07:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=1d1e0474d76b70617065c103fe5d781e3bf31dfc'/>
<id>urn:sha1:1d1e0474d76b70617065c103fe5d781e3bf31dfc</id>
<content type='text'>
Add code to support FSP-I binary measurement.

Signed-off-by: Hongbin1 Zhang &lt;hongbin1.zhang@intel.com&gt;
Cc: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Duggapu Chinni B &lt;chinni.b.duggapu@intel.com&gt;
Cc: Chen Gang C &lt;gang.c.chen@intel.com&gt;
Cc: Star Zeng &lt;star.zeng@intel.com&gt;
Cc: Ted Kuo &lt;ted.kuo@intel.com&gt;
Cc: Ashraf Ali S &lt;ashraf.ali.s@intel.com&gt;
Cc: Ray Ni &lt;ray.ni@intel.com&gt;
Cc: Jiewen Yao &lt;jiewen.yao@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2WrapperPkg/FspiWrapperPeim : Support API mode</title>
<updated>2024-12-20T06:29:58+00:00</updated>
<author>
<name>Hongbin1 Zhang</name>
<email>hongbin1.zhang@intel.com</email>
</author>
<published>2024-10-07T13:15:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=df1726a65ef2f7f9793bbad4d18596ac7dbf0749'/>
<id>urn:sha1:df1726a65ef2f7f9793bbad4d18596ac7dbf0749</id>
<content type='text'>
Add fspsmm init interface for API mode.

Signed-off-by: Hongbin1 Zhang &lt;hongbin1.zhang@intel.com&gt;
Cc: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Duggapu Chinni B &lt;chinni.b.duggapu@intel.com&gt;
Cc: Chen Gang C &lt;gang.c.chen@intel.com&gt;
Cc: Star Zeng &lt;star.zeng@intel.com&gt;
Cc: Ted Kuo &lt;ted.kuo@intel.com&gt;
Cc: Ashraf Ali S &lt;ashraf.ali.s@intel.com&gt;
Cc: Ray Ni &lt;ray.ni@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2WrapperPkg/FspiWrapperPeim : Support dispatch mode</title>
<updated>2024-12-20T06:29:58+00:00</updated>
<author>
<name>Hongbin1 Zhang</name>
<email>hongbin1.zhang@intel.com</email>
</author>
<published>2024-10-07T05:29:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=e374edc1802bed974b4881df18510d17f6ec1796'/>
<id>urn:sha1:e374edc1802bed974b4881df18510d17f6ec1796</id>
<content type='text'>
Add FSP-SMM code for dispatch mode.

Signed-off-by: Hongbin1 Zhang &lt;hongbin1.zhang@intel.com&gt;
Cc: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Duggapu Chinni B &lt;chinni.b.duggapu@intel.com&gt;
Cc: Chen Gang C &lt;gang.c.chen@intel.com&gt;
Cc: Star Zeng &lt;star.zeng@intel.com&gt;
Cc: Ted Kuo &lt;ted.kuo@intel.com&gt;
Cc: Ashraf Ali S &lt;ashraf.ali.s@intel.com&gt;
Cc: Ray Ni &lt;ray.ni@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2WrapperPkg/FspiWrapperPeim : FSP-I wrapper PEIM entrypoint</title>
<updated>2024-12-20T06:29:58+00:00</updated>
<author>
<name>Hongbin1 Zhang</name>
<email>hongbin1.zhang@intel.com</email>
</author>
<published>2024-10-06T13:02:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=6fd8533b6282047f418a07aa288296335c2f9fc4'/>
<id>urn:sha1:6fd8533b6282047f418a07aa288296335c2f9fc4</id>
<content type='text'>
FSP-I wrapper PEIM entrypoint is for including FSP-SMM code for both
dispatch and API mode.

Signed-off-by: Hongbin1 Zhang &lt;hongbin1.zhang@intel.com&gt;
Cc: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Duggapu Chinni B &lt;chinni.b.duggapu@intel.com&gt;
Cc: Chen Gang C &lt;gang.c.chen@intel.com&gt;
Cc: Star Zeng &lt;star.zeng@intel.com&gt;
Cc: Ted Kuo &lt;ted.kuo@intel.com&gt;
Cc: Ashraf Ali S &lt;ashraf.ali.s@intel.com&gt;
Cc: Ray Ni &lt;ray.ni@intel.com&gt;
</content>
</entry>
<entry>
<title>MdePkg: MdeLibs.dsc.inc: Apply StackCheckLibNull to All Module Types</title>
<updated>2024-11-13T21:01:46+00:00</updated>
<author>
<name>Oliver Smith-Denny</name>
<email>osde@microsoft.com</email>
</author>
<published>2024-10-27T16:35:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=ef4f3aa3f7e3c28c7f0e1a3c35711f1a85becd71'/>
<id>urn:sha1:ef4f3aa3f7e3c28c7f0e1a3c35711f1a85becd71</id>
<content type='text'>
Now that the ResetVectors are USER_DEFINED modules, they will not
be linked against StackCheckLibNull, which were the only modules
causing issues. So, we can now remove the kludge we had before
and the requirement for every DSC to include StackCheckLibNull
for SEC modules and just apply StackCheckLibNull globally.

This also changes every DSC to drop the SEC definition of
StackCheckLibNull.

Continuous-integration-options: PatchCheck.ignore-multi-package

Signed-off-by: Oliver Smith-Denny &lt;osde@linux.microsoft.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2WrapperPkg: Prevent null pointer dereference</title>
<updated>2024-10-28T16:10:09+00:00</updated>
<author>
<name>Michael Kubacki</name>
<email>michael.kubacki@microsoft.com</email>
</author>
<published>2024-09-27T20:46:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=4de80843a74475aef3ac47127cec0e52c1f5aa46'/>
<id>urn:sha1:4de80843a74475aef3ac47127cec0e52c1f5aa46</id>
<content type='text'>
Return from `FspsWrapperInitDispatchMode()` if a buffer allocation
fails instead of attempting to dereference the pointer.

Signed-off-by: Michael Kubacki &lt;michael.kubacki@microsoft.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2WrapperPkg: Add StackCheckLib</title>
<updated>2024-09-13T03:58:46+00:00</updated>
<author>
<name>Oliver Smith-Denny</name>
<email>osde@linux.microsoft.com</email>
</author>
<published>2024-07-29T23:07:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=847561eb53b390d1bc1f1c4df4a109f6e20f7f98'/>
<id>urn:sha1:847561eb53b390d1bc1f1c4df4a109f6e20f7f98</id>
<content type='text'>
Adds null version of StackCheckLib to SEC modules.

Signed-off-by: Oliver Smith-Denny &lt;osde@linux.microsoft.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2WrapperPkg/FspmWrapperPeim: Fix FspT/M address for measurement</title>
<updated>2024-08-01T15:43:20+00:00</updated>
<author>
<name>Zhihao Li</name>
<email>zhihao.li@intel.com</email>
</author>
<published>2024-04-29T01:43:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=5c9b889b81f9ad22c7442887be72abef054998b9'/>
<id>urn:sha1:5c9b889b81f9ad22c7442887be72abef054998b9</id>
<content type='text'>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4716

Tcg module should use permanent address of FSP-T/M for measurement.
TCG notification checks MigatedFvInfoHob and transmits
DRAM address for measurement.

Cc: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Duggapu Chinni B &lt;chinni.b.duggapu@intel.com&gt;
Cc: Chen Gang C &lt;gang.c.chen@intel.com&gt;

Signed-off-by: Zhihao Li &lt;zhihao.li@intel.com&gt;
</content>
</entry>
</feed>
