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<title>Tianocore/edk2.git/IntelFsp2WrapperPkg, branch dependabot/github_actions/actions/github-script-9</title>
<subtitle>EDK II (mirror)</subtitle>
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<updated>2026-04-29T09:18:10+00:00</updated>
<entry>
<title>IntelFsp2WrapperPkg: Remove duplicate library class in INF file</title>
<updated>2026-04-29T09:18:10+00:00</updated>
<author>
<name>Qihang Gao</name>
<email>gaoqihang@loongson.cn</email>
</author>
<published>2026-04-22T09:56:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=35102d932fef59eb9268c68eaab21df3ade0cb7a'/>
<id>urn:sha1:35102d932fef59eb9268c68eaab21df3ade0cb7a</id>
<content type='text'>
In FspWrapperMultiPhaseProcessLib driver, BaseMemoryLib appears twice
in [LibraryClasses] section, so remove the duplicate one.

Signed-off-by: Qihang Gao &lt;gaoqihang@loongson.cn&gt;
</content>
</entry>
<entry>
<title>IntelFsp2WrapperPkg: Replace include guards with #pragma once</title>
<updated>2026-02-23T21:01:28+00:00</updated>
<author>
<name>Michael Kubacki</name>
<email>michael.kubacki@microsoft.com</email>
</author>
<published>2026-02-03T18:38:30+00:00</published>
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<id>urn:sha1:648ea00a192c35eb62108d93e7db909e3afd0ca1</id>
<content type='text'>
Replace traditional `#ifndef`/`#define`/`#endif` include guards with
`#pragma` once.

`#pragma once` is a widely supported preprocessor directive that
prevents header files from being included multiple times. It is
supported by all toolchains used to build edk2: GCC, Clang/LLVM, and
MSVC.

Compared to macro-based include guards, `#pragma once`:

- Eliminates the risk of macro name collisions or copy/paste errors
  where two headers inadvertently use the same guard macro.
- Eliminate inconsistency in the way include guard macros are named
  (e.g., some files use `__FILE_H__`, others use `FILE_H_`, etc.).
- Reduces boilerplate (three lines replaced by one).
- Avoids polluting the macro namespace with guard symbols.
- Can improve build times as the preprocessor can skip re-opening the
  file entirely, rather than re-reading it to find the matching
  `#endif` ("multiple-include optimization").
  - Note that some compilers may already optimize traditional include
    guards, by recognzining the idiomatic pattern.

This change is made acknowledging that overall portability of the
code will technically be reduced, as `#pragma once` is not part of the
C/C++ standards.

However, this is considered acceptable given:

1. edk2 already defines a subset of supported compilers in
   BaseTools/Conf/tools_def.template, all of which have supported
   `#pragma once` for over two decades.
2. There have been concerns raised to the project about inconsistent
   include guard naming and potential macro collisions.

Approximate compiler support dates:

- MSVC: Supported since Visual C++ 4.2 (1996)
- GCC: Supported since 3.4 (2004)
  (http://gnu.ist.utl.pt/software/gcc/gcc-3.4/changes.html)
- Clang (LLVM based): Since initial release in 2007

Signed-off-by: Michael Kubacki &lt;michael.kubacki@microsoft.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2WrapperPkg: Rebase FSP-S and FSP-I if Image Base not match</title>
<updated>2025-10-30T08:13:29+00:00</updated>
<author>
<name>Zhiguang Liu</name>
<email>zhiguang.liu@intel.com</email>
</author>
<published>2025-09-25T08:45:44+00:00</published>
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<id>urn:sha1:426da7fb1a2d9155d2abf3a68b93ff37ed6898b1</id>
<content type='text'>
FSP Spec says: "The FSP is not Position Independent Code (PIC) and
each FSP component has to be rebased if it is placed at a location
which is different from the preferred base address specified during
the FSP build."
Normally, the FSP location in flash is the same preferred base
address specified during the FSP build. To avoid FSP-S and FSP-I
running directly from flash, platform may copy the FSP binaries into
physical memory. This causes FSP location to be different from the
preferred base address.
To support this, this commit checks the Image Base from FSP header
and the FSP base address PCD. If these two are different, This commit
assumes the FSP is copied into physical memory and FSP location is
changed. In such scenario, the commit will rebase the FSP to the address
provided by the PCD.

Signed-off-by: Zhiguang Liu &lt;zhiguang.liu@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2WrapperPkg: Bootloader need to recover fs and gs</title>
<updated>2025-03-05T18:21:49+00:00</updated>
<author>
<name>Hongbin1 Zhang</name>
<email>hongbin1.zhang@intel.com</email>
</author>
<published>2025-03-03T05:06:26+00:00</published>
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<id>urn:sha1:786ae7688414d58a14ef68b023af4b040f37323e</id>
<content type='text'>
When enter FSP, bootloader need to save fs and gs, when back
to bootloader, bootloader need to restore fs and gs, so it
could avoid bootloader access wrong data segment when usging
fs and gs.

Signed-off-by: Hongbin1 Zhang &lt;hongbin1.zhang@intel.com&gt;
Cc: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Duggapu Chinni B &lt;chinni.b.duggapu@intel.com&gt;
Cc: Star Zeng &lt;star.zeng@intel.com&gt;
Cc: Ted Kuo &lt;ted.kuo@intel.com&gt;
Cc: Ashraf Ali S &lt;ashraf.ali.s@intel.com&gt;
Cc: Ray Ni &lt;ray.ni@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2WrapperPkg: Save FspHobListPtr right after FspMemoryInit exits</title>
<updated>2024-12-25T02:56:26+00:00</updated>
<author>
<name>Du Lin</name>
<email>du.lin@intel.com</email>
</author>
<published>2024-12-20T15:49:19+00:00</published>
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<id>urn:sha1:da6504e5ccaa233b0ec051762809905f20ca5859</id>
<content type='text'>
Save FspHobList pointer to HOB right after FspMemoryInit exits so that
FspHobList pointer is available when performing platform related reset
in CallFspWrapperResetSystem(). Some platforms may consume FSP HOBs
prior to performing platform related reset.

Signed-off-by: Du Lin &lt;du.lin@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2WrapperPkg/FspiWrapperPeim : Support FSP-I measurement</title>
<updated>2024-12-20T06:29:58+00:00</updated>
<author>
<name>Hongbin1 Zhang</name>
<email>hongbin1.zhang@intel.com</email>
</author>
<published>2024-10-11T11:07:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=1d1e0474d76b70617065c103fe5d781e3bf31dfc'/>
<id>urn:sha1:1d1e0474d76b70617065c103fe5d781e3bf31dfc</id>
<content type='text'>
Add code to support FSP-I binary measurement.

Signed-off-by: Hongbin1 Zhang &lt;hongbin1.zhang@intel.com&gt;
Cc: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Duggapu Chinni B &lt;chinni.b.duggapu@intel.com&gt;
Cc: Chen Gang C &lt;gang.c.chen@intel.com&gt;
Cc: Star Zeng &lt;star.zeng@intel.com&gt;
Cc: Ted Kuo &lt;ted.kuo@intel.com&gt;
Cc: Ashraf Ali S &lt;ashraf.ali.s@intel.com&gt;
Cc: Ray Ni &lt;ray.ni@intel.com&gt;
Cc: Jiewen Yao &lt;jiewen.yao@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2WrapperPkg/FspiWrapperPeim : Support API mode</title>
<updated>2024-12-20T06:29:58+00:00</updated>
<author>
<name>Hongbin1 Zhang</name>
<email>hongbin1.zhang@intel.com</email>
</author>
<published>2024-10-07T13:15:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=df1726a65ef2f7f9793bbad4d18596ac7dbf0749'/>
<id>urn:sha1:df1726a65ef2f7f9793bbad4d18596ac7dbf0749</id>
<content type='text'>
Add fspsmm init interface for API mode.

Signed-off-by: Hongbin1 Zhang &lt;hongbin1.zhang@intel.com&gt;
Cc: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Duggapu Chinni B &lt;chinni.b.duggapu@intel.com&gt;
Cc: Chen Gang C &lt;gang.c.chen@intel.com&gt;
Cc: Star Zeng &lt;star.zeng@intel.com&gt;
Cc: Ted Kuo &lt;ted.kuo@intel.com&gt;
Cc: Ashraf Ali S &lt;ashraf.ali.s@intel.com&gt;
Cc: Ray Ni &lt;ray.ni@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2WrapperPkg/FspiWrapperPeim : Support dispatch mode</title>
<updated>2024-12-20T06:29:58+00:00</updated>
<author>
<name>Hongbin1 Zhang</name>
<email>hongbin1.zhang@intel.com</email>
</author>
<published>2024-10-07T05:29:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=e374edc1802bed974b4881df18510d17f6ec1796'/>
<id>urn:sha1:e374edc1802bed974b4881df18510d17f6ec1796</id>
<content type='text'>
Add FSP-SMM code for dispatch mode.

Signed-off-by: Hongbin1 Zhang &lt;hongbin1.zhang@intel.com&gt;
Cc: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Duggapu Chinni B &lt;chinni.b.duggapu@intel.com&gt;
Cc: Chen Gang C &lt;gang.c.chen@intel.com&gt;
Cc: Star Zeng &lt;star.zeng@intel.com&gt;
Cc: Ted Kuo &lt;ted.kuo@intel.com&gt;
Cc: Ashraf Ali S &lt;ashraf.ali.s@intel.com&gt;
Cc: Ray Ni &lt;ray.ni@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2WrapperPkg/FspiWrapperPeim : FSP-I wrapper PEIM entrypoint</title>
<updated>2024-12-20T06:29:58+00:00</updated>
<author>
<name>Hongbin1 Zhang</name>
<email>hongbin1.zhang@intel.com</email>
</author>
<published>2024-10-06T13:02:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=6fd8533b6282047f418a07aa288296335c2f9fc4'/>
<id>urn:sha1:6fd8533b6282047f418a07aa288296335c2f9fc4</id>
<content type='text'>
FSP-I wrapper PEIM entrypoint is for including FSP-SMM code for both
dispatch and API mode.

Signed-off-by: Hongbin1 Zhang &lt;hongbin1.zhang@intel.com&gt;
Cc: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Duggapu Chinni B &lt;chinni.b.duggapu@intel.com&gt;
Cc: Chen Gang C &lt;gang.c.chen@intel.com&gt;
Cc: Star Zeng &lt;star.zeng@intel.com&gt;
Cc: Ted Kuo &lt;ted.kuo@intel.com&gt;
Cc: Ashraf Ali S &lt;ashraf.ali.s@intel.com&gt;
Cc: Ray Ni &lt;ray.ni@intel.com&gt;
</content>
</entry>
<entry>
<title>MdePkg: MdeLibs.dsc.inc: Apply StackCheckLibNull to All Module Types</title>
<updated>2024-11-13T21:01:46+00:00</updated>
<author>
<name>Oliver Smith-Denny</name>
<email>osde@microsoft.com</email>
</author>
<published>2024-10-27T16:35:30+00:00</published>
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<id>urn:sha1:ef4f3aa3f7e3c28c7f0e1a3c35711f1a85becd71</id>
<content type='text'>
Now that the ResetVectors are USER_DEFINED modules, they will not
be linked against StackCheckLibNull, which were the only modules
causing issues. So, we can now remove the kludge we had before
and the requirement for every DSC to include StackCheckLibNull
for SEC modules and just apply StackCheckLibNull globally.

This also changes every DSC to drop the SEC definition of
StackCheckLibNull.

Continuous-integration-options: PatchCheck.ignore-multi-package

Signed-off-by: Oliver Smith-Denny &lt;osde@linux.microsoft.com&gt;
</content>
</entry>
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