<feed xmlns='http://www.w3.org/2005/Atom'>
<title>Tianocore/edk2.git/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample, branch master</title>
<subtitle>EDK II (mirror)</subtitle>
<id>https://git.radix-linux.su/Tianocore/edk2.git/atom?h=master</id>
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<updated>2026-02-23T21:01:28+00:00</updated>
<entry>
<title>IntelFsp2WrapperPkg: Replace include guards with #pragma once</title>
<updated>2026-02-23T21:01:28+00:00</updated>
<author>
<name>Michael Kubacki</name>
<email>michael.kubacki@microsoft.com</email>
</author>
<published>2026-02-03T18:38:30+00:00</published>
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<id>urn:sha1:648ea00a192c35eb62108d93e7db909e3afd0ca1</id>
<content type='text'>
Replace traditional `#ifndef`/`#define`/`#endif` include guards with
`#pragma` once.

`#pragma once` is a widely supported preprocessor directive that
prevents header files from being included multiple times. It is
supported by all toolchains used to build edk2: GCC, Clang/LLVM, and
MSVC.

Compared to macro-based include guards, `#pragma once`:

- Eliminates the risk of macro name collisions or copy/paste errors
  where two headers inadvertently use the same guard macro.
- Eliminate inconsistency in the way include guard macros are named
  (e.g., some files use `__FILE_H__`, others use `FILE_H_`, etc.).
- Reduces boilerplate (three lines replaced by one).
- Avoids polluting the macro namespace with guard symbols.
- Can improve build times as the preprocessor can skip re-opening the
  file entirely, rather than re-reading it to find the matching
  `#endif` ("multiple-include optimization").
  - Note that some compilers may already optimize traditional include
    guards, by recognzining the idiomatic pattern.

This change is made acknowledging that overall portability of the
code will technically be reduced, as `#pragma once` is not part of the
C/C++ standards.

However, this is considered acceptable given:

1. edk2 already defines a subset of supported compilers in
   BaseTools/Conf/tools_def.template, all of which have supported
   `#pragma once` for over two decades.
2. There have been concerns raised to the project about inconsistent
   include guard naming and potential macro collisions.

Approximate compiler support dates:

- MSVC: Supported since Visual C++ 4.2 (1996)
- GCC: Supported since 3.4 (2004)
  (http://gnu.ist.utl.pt/software/gcc/gcc-3.4/changes.html)
- Clang (LLVM based): Since initial release in 2007

Signed-off-by: Michael Kubacki &lt;michael.kubacki@microsoft.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2WrapperPkg: Fsp T UPD Structure Bug Fix</title>
<updated>2024-04-09T17:15:10+00:00</updated>
<author>
<name>Duggapu Chinni B</name>
<email>chinni.b.duggapu@intel.com</email>
</author>
<published>2024-04-09T16:53:10+00:00</published>
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<id>urn:sha1:665789b61bc39de67d3f17288bacb4662434e251</id>
<content type='text'>
Add reserved bytes as per the latest spec.

Cc: Sai Chaganty &lt;rangasai.v.chaganty@intel.com&gt;
Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Chiu Chasel &lt;chasel.chiu@intel.com&gt;
Cc: Duggapu Chinni B &lt;chinni.b.duggapu@intel.com&gt;
Cc: Ni Ray &lt;ray.ni@intel.com&gt;

Signed-off-by: Duggapu Chinni B &lt;chinni.b.duggapu@intel.com&gt;
Reviewed-by: Chiu Chasel &lt;chasel.chiu@intel.com&gt;
Reviewed-by: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2WrapperPkg: Fsp T new ARCH UPD Support</title>
<updated>2024-04-09T17:15:10+00:00</updated>
<author>
<name>Duggapu Chinni B</name>
<email>chinni.b.duggapu@intel.com</email>
</author>
<published>2024-04-09T16:43:28+00:00</published>
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<id>urn:sha1:013006e4ef75ef6794a8e09c84f818ab5024da2f</id>
<content type='text'>
Changes in SecRamInitData to support spec changes

Cc: Sai Chaganty &lt;rangasai.v.chaganty@intel.com&gt;
Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Chiu Chasel &lt;chasel.chiu@intel.com&gt;
Cc: Duggapu Chinni B &lt;chinni.b.duggapu@intel.com&gt;
Cc: Ni Ray &lt;ray.ni@intel.com&gt;

Signed-off-by: Duggapu Chinni B &lt;chinni.b.duggapu@intel.com&gt;
Reviewed-by: Chiu Chasel &lt;chasel.chiu@intel.com&gt;
Reviewed-by: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2WrapperPkg: Fix code formatting errors</title>
<updated>2022-10-04T16:53:59+00:00</updated>
<author>
<name>Michael Kubacki</name>
<email>michael.kubacki@microsoft.com</email>
</author>
<published>2022-09-06T19:52:39+00:00</published>
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<id>urn:sha1:7c424c28b0adff2da455769521408dbf772c1ed7</id>
<content type='text'>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4048

This package did not have CI enabled so code changes were merged
that fail uncrustify formatting. This change updates those files
to include uncustify formatting.

Cc: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Star Zeng &lt;star.zeng@intel.com&gt;
Signed-off-by: Michael Kubacki &lt;michael.kubacki@microsoft.com&gt;
Reviewed-by: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Reviewed-by: Michael D Kinney &lt;michael.d.kinney&gt;
</content>
</entry>
<entry>
<title>IntelFsp2WrapperPkg: FSP_TEMP_RAM_INIT call for X64 Calling Convention</title>
<updated>2022-05-31T11:14:20+00:00</updated>
<author>
<name>Duggapu, Chinni B</name>
<email>chinni.b.duggapu@intel.com</email>
</author>
<published>2022-05-17T08:44:01+00:00</published>
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<id>urn:sha1:df1c7e91b46db364ba1ce5e21660987c29c35334</id>
<content type='text'>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3926
Pass Input parameters using RCX.

Cc: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Star Zeng &lt;star.zeng@intel.com&gt;
Cc: Ashraf Ali S &lt;ashraf.ali.s@intel.com&gt;
Signed-off-by: cbduggap &lt;chinni.b.duggapu@intel.com&gt;
Reviewed-by: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Reviewed-by: Ted Kuo &lt;ted.kuo@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2WrapperPkg: SecFspWrapperPlatformSecLibSample support for X64</title>
<updated>2022-04-16T00:18:14+00:00</updated>
<author>
<name>Ted Kuo</name>
<email>ted.kuo@intel.com</email>
</author>
<published>2022-04-15T08:37:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=91a03f78ba0b75bc4ed2c4b756cbe57c685d9c72'/>
<id>urn:sha1:91a03f78ba0b75bc4ed2c4b756cbe57c685d9c72</id>
<content type='text'>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3893
1.Added SecFspWrapperPlatformSecLibSample support for X64.
2.Adopted FSPT_ARCH2_UPD in SecFspWrapperPlatformSecLibSample.
3.Moved Fsp.h up one level to be shared across IA32 and X64.

Cc: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Star Zeng &lt;star.zeng@intel.com&gt;
Cc: Ashraf Ali S &lt;ashraf.ali.s@intel.com&gt;
Signed-off-by: Ted Kuo &lt;ted.kuo@intel.com&gt;
Reviewed-by: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Reviewed-by: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2WrapperPkg: Apply uncrustify changes</title>
<updated>2021-12-07T17:24:28+00:00</updated>
<author>
<name>Michael Kubacki</name>
<email>michael.kubacki@microsoft.com</email>
</author>
<published>2021-12-05T22:54:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=7c7184e201a90a1d2376e615e55e3f4074731468'/>
<id>urn:sha1:7c7184e201a90a1d2376e615e55e3f4074731468</id>
<content type='text'>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the IntelFsp2WrapperPkg package

Cc: Andrew Fish &lt;afish@apple.com&gt;
Cc: Leif Lindholm &lt;leif@nuviainc.com&gt;
Cc: Michael D Kinney &lt;michael.d.kinney@intel.com&gt;
Signed-off-by: Michael Kubacki &lt;michael.kubacki@microsoft.com&gt;
Reviewed-by: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2WrapperPkg: Remove microcode related PCDs</title>
<updated>2021-05-31T03:14:08+00:00</updated>
<author>
<name>Lou, Yun</name>
<email>Yun.Lou@intel.com</email>
</author>
<published>2021-04-15T06:48:47+00:00</published>
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<id>urn:sha1:fe5da0927aad98f3c005088197fa30c1b8f9d3e8</id>
<content type='text'>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3334

IntelFsp2WrapperPkg defines following PCDs:
  PcdCpuMicrocodePatchAddress
  PcdCpuMicrocodePatchRegionSize
  PcdFlashMicrocodeOffset

But the PCD name caused confusion because UefiCpuPkg defines:
  PcdCpuMicrocodePatchAddress
  PcdCpuMicrocodePatchRegionSize

PcdCpuMicrocodePatchAddress in IntelFsp2WrapperPkg means the base
address of the FV that holds the microcode.
PcdCpuMicrocodePatchAddress in UefiCpuPkg means the address of the
microcode.

The relationship between the PCDs is:
IntelFsp2WrapperPkg.PcdCpuMicrocodePatchAddress
 +  IntelFsp2WrapperPkg.PcdFlashMicrocodeOffset
 == UefiCpuPkg.PcdCpuMicrocodePatchAddress

IntelFsp2WrapperPkg.PcdCpuMicrocodePatchRegionSize
 -  IntelFsp2WrapperPkg.PcdFlashMicrocodeOffset
 == UefiCpuPkg.PcdCpuMicrocodePatchRegionSize

To avoid confusion and actually the PCDs in IntelFsp2WrapperPkg
are only used by a sample FSP-T wrapper, this patch removes
the 3 PCDs defined in IntelFsp2WrapperPkg.

The FSP-T wrapper is updated to directly use the ones in UefiCpuPkg.

Signed-off-by: Jason Lou &lt;yun.lou@intel.com&gt;
Cc: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Star Zeng &lt;star.zeng@intel.com&gt;
Cc: Ray Ni &lt;ray.ni@intel.com&gt;
Reviewed-by: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Reviewed-by: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2WrapperPkg: Add FSP*_ARCH_UPD.</title>
<updated>2020-06-23T04:22:49+00:00</updated>
<author>
<name>Chasel Chiu</name>
<email>chasel.chiu@intel.com</email>
</author>
<published>2020-06-18T12:59:37+00:00</published>
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<id>urn:sha1:1a992030522622c42aa063788b3276789c56c1e1</id>
<content type='text'>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2781

Provides sample code to include FSPT_ARCH_UPD initial values with
UPD header revision set to 2.

Cc: Maurice Ma &lt;maurice.ma@intel.com&gt;
Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Star Zeng &lt;star.zeng@intel.com&gt;
Signed-off-by: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Reviewed-by: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2WrapperPkg: Fix various typos</title>
<updated>2019-12-11T01:42:31+00:00</updated>
<author>
<name>Antoine Coeur</name>
<email>coeur@gmx.fr</email>
</author>
<published>2019-12-04T04:14:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=97eedf5dfbaffde33210fd88066247cf0b7d3325'/>
<id>urn:sha1:97eedf5dfbaffde33210fd88066247cf0b7d3325</id>
<content type='text'>
Fix various typos in comments and documentation.

Cc: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Star Zeng &lt;star.zeng@intel.com&gt;
Reviewed-by: Philippe Mathieu-Daude &lt;philmd@redhat.com&gt;
Signed-off-by: Philippe Mathieu-Daude &lt;philmd@redhat.com&gt;
Reviewed-by: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Reviewed-by: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Reviewed-by: Star Zeng &lt;star.zeng@intel.com&gt;
</content>
</entry>
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