<feed xmlns='http://www.w3.org/2005/Atom'>
<title>Tianocore/edk2.git/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec, branch dependabot/github_actions/actions/setup-python-7</title>
<subtitle>EDK II (mirror)</subtitle>
<id>https://git.radix-linux.su/Tianocore/edk2.git/atom?h=dependabot%2Fgithub_actions%2Factions%2Fsetup-python-7</id>
<link rel='self' href='https://git.radix-linux.su/Tianocore/edk2.git/atom?h=dependabot%2Fgithub_actions%2Factions%2Fsetup-python-7'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/'/>
<updated>2024-12-20T06:29:58+00:00</updated>
<entry>
<title>IntelFsp2WrapperPkg/FspiWrapperPeim : Support API mode</title>
<updated>2024-12-20T06:29:58+00:00</updated>
<author>
<name>Hongbin1 Zhang</name>
<email>hongbin1.zhang@intel.com</email>
</author>
<published>2024-10-07T13:15:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=df1726a65ef2f7f9793bbad4d18596ac7dbf0749'/>
<id>urn:sha1:df1726a65ef2f7f9793bbad4d18596ac7dbf0749</id>
<content type='text'>
Add fspsmm init interface for API mode.

Signed-off-by: Hongbin1 Zhang &lt;hongbin1.zhang@intel.com&gt;
Cc: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Duggapu Chinni B &lt;chinni.b.duggapu@intel.com&gt;
Cc: Chen Gang C &lt;gang.c.chen@intel.com&gt;
Cc: Star Zeng &lt;star.zeng@intel.com&gt;
Cc: Ted Kuo &lt;ted.kuo@intel.com&gt;
Cc: Ashraf Ali S &lt;ashraf.ali.s@intel.com&gt;
Cc: Ray Ni &lt;ray.ni@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2WrapperPkg/FspiWrapperPeim : Support dispatch mode</title>
<updated>2024-12-20T06:29:58+00:00</updated>
<author>
<name>Hongbin1 Zhang</name>
<email>hongbin1.zhang@intel.com</email>
</author>
<published>2024-10-07T05:29:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=e374edc1802bed974b4881df18510d17f6ec1796'/>
<id>urn:sha1:e374edc1802bed974b4881df18510d17f6ec1796</id>
<content type='text'>
Add FSP-SMM code for dispatch mode.

Signed-off-by: Hongbin1 Zhang &lt;hongbin1.zhang@intel.com&gt;
Cc: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Duggapu Chinni B &lt;chinni.b.duggapu@intel.com&gt;
Cc: Chen Gang C &lt;gang.c.chen@intel.com&gt;
Cc: Star Zeng &lt;star.zeng@intel.com&gt;
Cc: Ted Kuo &lt;ted.kuo@intel.com&gt;
Cc: Ashraf Ali S &lt;ashraf.ali.s@intel.com&gt;
Cc: Ray Ni &lt;ray.ni@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2WrapperPkg: FSP measurement based on PcdFspMeasurementConfig</title>
<updated>2024-07-12T04:52:47+00:00</updated>
<author>
<name>Awiral Shrivastava</name>
<email>awiral.shrivastava@intel.com</email>
</author>
<published>2024-07-05T07:04:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=2e7230f1ba65e0ec9e6a3e191cca3a8b04e22ca8'/>
<id>urn:sha1:2e7230f1ba65e0ec9e6a3e191cca3a8b04e22ca8</id>
<content type='text'>
REF : https://bugzilla.tianocore.org/show_bug.cgi?id=4725

ACM provides register to report TPM measurement status. If ACM has
already measured FSP component, BIOS shoule be able to skip measurement.
PcdFspMeasurementConfig should be DynamicEx to skip measurement.

Signed-off-by: Awiral Shrivastava &lt;awiral.shrivastava@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2WrapperPkg: Add header for PlatformMultiPhaseLib.</title>
<updated>2022-10-05T04:13:53+00:00</updated>
<author>
<name>Chasel Chiu</name>
<email>chasel.chiu@intel.com</email>
</author>
<published>2022-10-04T20:10:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=f054beec548eb3cc718b35be20efa9d344fe7097'/>
<id>urn:sha1:f054beec548eb3cc718b35be20efa9d344fe7097</id>
<content type='text'>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4092

To comply with coding style rule each library class
should have its own header even if it is just a private child library
instance consumed by parent public library in the same package.

Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Star Zeng &lt;star.zeng@intel.com&gt;
Signed-off-by: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Reviewed-by: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2WrapperPkg: Remove duplicated words</title>
<updated>2022-09-01T23:22:53+00:00</updated>
<author>
<name>Pierre Gondois</name>
<email>pierre.gondois@arm.com</email>
</author>
<published>2022-08-23T16:00:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=6edd257861fd8ef44d23a6c1afb329efd95a9ae7'/>
<id>urn:sha1:6edd257861fd8ef44d23a6c1afb329efd95a9ae7</id>
<content type='text'>
In an effort to clean the documentation of the above
package, remove duplicated words.

Cc: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Signed-off-by: Pierre Gondois &lt;pierre.gondois@arm.com&gt;
Reviewed-by: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Reviewed-by: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2WrapperPkg: Add FSP 2.4 MultiPhase interface.</title>
<updated>2022-08-31T16:48:07+00:00</updated>
<author>
<name>Chasel Chiu</name>
<email>chasel.chiu@intel.com</email>
</author>
<published>2022-08-10T00:31:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=31a94f7fba2a2c1244fc35b6f631e235e267715b'/>
<id>urn:sha1:31a94f7fba2a2c1244fc35b6f631e235e267715b</id>
<content type='text'>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3916

Provide FSP 2.4 MultiPhase wrapper support library.

Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Star Zeng &lt;star.zeng@intel.com&gt;
Signed-off-by: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Reviewed-by: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2WrapperPkg : FSPM/S UPD data address based on Build Type</title>
<updated>2021-12-20T03:42:50+00:00</updated>
<author>
<name>S, Ashraf Ali</name>
<email>ashraf.ali.s@intel.com</email>
</author>
<published>2021-12-16T08:10:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=de9e5b7dc721d4ca319c0455cf83577347e0abef'/>
<id>urn:sha1:de9e5b7dc721d4ca319c0455cf83577347e0abef</id>
<content type='text'>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3642
when the module is not building in IA32 mode which will lead to building
error. when a module built-in X64 function pointer will be the size of
64bit width which cannot be fit in 32bit address which will lead to
error. to overcome this issue introducing the 2 new PCD's for the 64bit
modules can consume it. based on the which pcd platform set, use that.

Cc: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Star Zeng &lt;star.zeng@intel.com&gt;
Cc: Kuo Ted &lt;ted.kuo@intel.com&gt;
Cc: Duggapu Chinni B &lt;chinni.b.duggapu@intel.com&gt;
Cc: Rangasai V Chaganty &lt;rangasai.v.chaganty@intel.com&gt;
Cc: Digant H Solanki &lt;digant.h.solanki@intel.com&gt;
Cc: Sangeetha V &lt;sangeetha.v@intel.com&gt;
Cc: Ray Ni &lt;ray.ni@intel.com&gt;
Signed-off-by: Ashraf Ali S &lt;ashraf.ali.s@intel.com&gt;
Reviewed-by: Star Zeng &lt;star.zeng@intel.com&gt;
Reviewed-by: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2WrapperPkg: Make PcdFspModeSelection dynamic</title>
<updated>2021-09-22T08:37:09+00:00</updated>
<author>
<name>Zhang Xiaoqiang</name>
<email>xiaoqiang.zhang@intel.com</email>
</author>
<published>2021-09-16T03:44:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=f334c5a41dc4702b1c767c6614025aa2f802f9a4'/>
<id>urn:sha1:f334c5a41dc4702b1c767c6614025aa2f802f9a4</id>
<content type='text'>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3632

PcdFspModeSelection will be used to set FSP mode.
Make PcdFspModeSelection dynamic and set it accordingly.

Signed-off-by: Zhang Xiaoqiang &lt;xiaoqiang.zhang@intel.com&gt;
Cc: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Star Zeng &lt;star.zeng@intel.com&gt;
Reviewed-by: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2WrapperPkg: Remove microcode related PCDs</title>
<updated>2021-05-31T03:14:08+00:00</updated>
<author>
<name>Lou, Yun</name>
<email>Yun.Lou@intel.com</email>
</author>
<published>2021-04-15T06:48:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=fe5da0927aad98f3c005088197fa30c1b8f9d3e8'/>
<id>urn:sha1:fe5da0927aad98f3c005088197fa30c1b8f9d3e8</id>
<content type='text'>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3334

IntelFsp2WrapperPkg defines following PCDs:
  PcdCpuMicrocodePatchAddress
  PcdCpuMicrocodePatchRegionSize
  PcdFlashMicrocodeOffset

But the PCD name caused confusion because UefiCpuPkg defines:
  PcdCpuMicrocodePatchAddress
  PcdCpuMicrocodePatchRegionSize

PcdCpuMicrocodePatchAddress in IntelFsp2WrapperPkg means the base
address of the FV that holds the microcode.
PcdCpuMicrocodePatchAddress in UefiCpuPkg means the address of the
microcode.

The relationship between the PCDs is:
IntelFsp2WrapperPkg.PcdCpuMicrocodePatchAddress
 +  IntelFsp2WrapperPkg.PcdFlashMicrocodeOffset
 == UefiCpuPkg.PcdCpuMicrocodePatchAddress

IntelFsp2WrapperPkg.PcdCpuMicrocodePatchRegionSize
 -  IntelFsp2WrapperPkg.PcdFlashMicrocodeOffset
 == UefiCpuPkg.PcdCpuMicrocodePatchRegionSize

To avoid confusion and actually the PCDs in IntelFsp2WrapperPkg
are only used by a sample FSP-T wrapper, this patch removes
the 3 PCDs defined in IntelFsp2WrapperPkg.

The FSP-T wrapper is updated to directly use the ones in UefiCpuPkg.

Signed-off-by: Jason Lou &lt;yun.lou@intel.com&gt;
Cc: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Star Zeng &lt;star.zeng@intel.com&gt;
Cc: Ray Ni &lt;ray.ni@intel.com&gt;
Reviewed-by: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Reviewed-by: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec: add FspMeasurementLib.h</title>
<updated>2020-09-01T15:40:02+00:00</updated>
<author>
<name>Qi Zhang</name>
<email>qi1.zhang@intel.com</email>
</author>
<published>2020-08-31T02:07:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=0c5c45a1337f82569aa9e60323e1a05a0cbbad74'/>
<id>urn:sha1:0c5c45a1337f82569aa9e60323e1a05a0cbbad74</id>
<content type='text'>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2944

Cc: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Liming Gao &lt;gaoliming@byosoft.com.cn&gt;
Cc: Eric Dong &lt;eric.dong@intel.com&gt;
Signed-off-by: Qi Zhang &lt;qi1.zhang@intel.com&gt;
Message-Id: &lt;20200831020721.8967-1-qi1.zhang@intel.com&gt;
Reviewed-by: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
</content>
</entry>
</feed>
