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<title>Tianocore/edk2.git/IntelFsp2Pkg/Library, branch dependabot/github_actions/actions/setup-python-6</title>
<subtitle>EDK II (mirror)</subtitle>
<id>https://git.radix-linux.su/Tianocore/edk2.git/atom?h=dependabot%2Fgithub_actions%2Factions%2Fsetup-python-6</id>
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<updated>2025-07-18T06:21:48+00:00</updated>
<entry>
<title>IntelFsp2Pkg: Preserve GDTR and CS/DS/ES/FS/GS/SS</title>
<updated>2025-07-18T06:21:48+00:00</updated>
<author>
<name>Ray Ni</name>
<email>ray.ni@intel.com</email>
</author>
<published>2025-07-15T07:41:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=562bce0febd641f78df7cd61f2ed5a4c944b31ac'/>
<id>urn:sha1:562bce0febd641f78df7cd61f2ed5a4c944b31ac</id>
<content type='text'>
Bootloader does not expect FSP modifies GDTR and segment selectors, update
FSP entry/exit code to preserve these registers.

Signed-off-by: Ray Ni &lt;ray.ni@intel.com&gt;
Cc: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Star Zeng &lt;star.zeng@intel.com&gt;
Cc: Ted Kuo &lt;ted.kuo@intel.com&gt;
Cc: Ashraf Ali S &lt;ashraf.ali.s@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2Pkg/FspMultiPhaseLib: Remove EFIAPI for local function</title>
<updated>2025-07-16T06:47:27+00:00</updated>
<author>
<name>Ray Ni</name>
<email>ray.ni@intel.com</email>
</author>
<published>2025-07-15T07:43:07+00:00</published>
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<id>urn:sha1:83794b8e968e0928aec5333b66d094d0ae289770</id>
<content type='text'>
FspMultiPhaseWorker() is a local function that's called from
FspMultiPhaseMemInitApiHandler()
and FspMultiPhaseSiInitApiHandlerV2().

Remove "EFIAPI" from its function header.

Signed-off-by: Ray Ni &lt;ray.ni@intel.com&gt;
Cc: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Star Zeng &lt;star.zeng@intel.com&gt;
Cc: Ted Kuo &lt;ted.kuo@intel.com&gt;
Cc: Ashraf Ali S &lt;ashraf.ali.s@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2Pkg/FspCommonLib: Remove unused API SetFspCoreStackPointer()</title>
<updated>2025-07-16T06:47:27+00:00</updated>
<author>
<name>Ray Ni</name>
<email>ray.ni@intel.com</email>
</author>
<published>2025-07-14T07:48:15+00:00</published>
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<id>urn:sha1:36b63e9fc87e4494067fb2cfa702449cfbb55b86</id>
<content type='text'>
Signed-off-by: Ray Ni &lt;ray.ni@intel.com&gt;
Cc: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Star Zeng &lt;star.zeng@intel.com&gt;
Cc: Ted Kuo &lt;ted.kuo@intel.com&gt;
Cc: Ashraf Ali S &lt;ashraf.ali.s@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2Pkg/CacheLib: Make integer width consistent in loop condition</title>
<updated>2025-05-24T01:06:53+00:00</updated>
<author>
<name>Michael Kubacki</name>
<email>michael.kubacki@microsoft.com</email>
</author>
<published>2025-04-30T15:28:32+00:00</published>
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<id>urn:sha1:ee6a2bfc2c9cfadc05ca0ecaaf17734521bb7aa0</id>
<content type='text'>
Explicitly casts `mFixedMtrrTable[MsrNum].Length` to resolve a
`comparison-with-wider-type` CodeQL error.

https://codeql.github.com/codeql-query-help/cpp/cpp-comparison-with-wider-type/

Signed-off-by: Michael Kubacki &lt;michael.kubacki@microsoft.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2Pkg : Refactor BaseFspCommonLib to reduce binary size</title>
<updated>2024-09-30T08:15:35+00:00</updated>
<author>
<name>Ashraf Ali</name>
<email>ashraf.ali.s@intel.com</email>
</author>
<published>2024-09-08T15:15:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=a6b472131e6f49ec6ec309a06fed3b70b97a8602'/>
<id>urn:sha1:a6b472131e6f49ec6ec309a06fed3b70b97a8602</id>
<content type='text'>
Moved FspApiReturnStatusReset API to a separate file to eliminate
unnecessary inclusion of FspApiReturnStatusReset APIs in driver binary.

When the compiler linking the Object files it may not remove all the
unused from NASM OBJs. This change is to reorganize the C files to
minimize the impact of the NASM behavior resulting is code size
reduction.

Signed-off-by: Ashraf Ali &lt;ashraf.ali.s@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2Pkg: Support FSP API to save and restore page table</title>
<updated>2024-09-11T05:45:54+00:00</updated>
<author>
<name>Zhiguang Liu</name>
<email>zhiguang.liu@intel.com</email>
</author>
<published>2024-06-18T08:13:12+00:00</published>
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<id>urn:sha1:14c9ba1a2ca64137de148968823dc20988dcaa4c</id>
<content type='text'>
A potential issue may happen when FSP creates/changes page table while
bootloader doesn't expect page table being changed in FSP.
Current, FSP API support to save/restore stack, IDT and general purpose
registers. Following the same pattern, add save/restore page table
support to solve this issue.
Note that this feature only impacts FSP API mode, and is controlled
by PCD PcdFspSaveRestorePageTableEnable. For compatibility, the PCD
default value is set as FALSE.

Signed-off-by: Zhiguang Liu &lt;zhiguang.liu@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2Pkg: Align FSP global data pointer for X64 build</title>
<updated>2024-08-28T13:40:56+00:00</updated>
<author>
<name>Hongbin1 Zhang</name>
<email>hongbin1.zhang@intel.com</email>
</author>
<published>2024-07-26T02:16:42+00:00</published>
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<id>urn:sha1:1fd2f9ec8f16cc8efb949888db94eb42006f77c6</id>
<content type='text'>
When it used 32 bits for set FSP global data pointer under X64 build,
it should get FSP global data pointer with 32 bits data under X64 build.

Signed-off-by: Hongbin1 Zhang &lt;hongbin1.zhang@intel.com&gt;
Cc: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Duggapu Chinni B &lt;chinni.b.duggapu@intel.com&gt;
Cc: Star Zeng &lt;star.zeng@intel.com&gt;
Cc: Ted Kuo &lt;ted.kuo@intel.com&gt;
Cc: Ashraf Ali S &lt;ashraf.ali.s@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2Pkg: Fsp T new ARCH UPD Support</title>
<updated>2024-04-09T17:15:10+00:00</updated>
<author>
<name>Duggapu Chinni B</name>
<email>chinni.b.duggapu@intel.com</email>
</author>
<published>2024-04-05T04:00:48+00:00</published>
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<id>urn:sha1:543add1d414f6016829f7d706fdefb3b830020ef</id>
<content type='text'>
Changes to support spec changes

1. Remove usage of Pcd.
2. Change code to validate the Temporary Ram size input.
3. Consume the input saved in YMM Register

Cc: Sai Chaganty &lt;rangasai.v.chaganty@intel.com&gt;
Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Chiu Chasel &lt;chasel.chiu@intel.com&gt;
Cc: Duggapu Chinni B &lt;chinni.b.duggapu@intel.com&gt;
Cc: Ni Ray &lt;ray.ni@intel.com&gt;

Signed-off-by: Duggapu Chinni B &lt;chinni.b.duggapu@intel.com&gt;
Reviewed-by: Chiu Chasel &lt;chasel.chiu@intel.com&gt;
Reviewed-by: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2Pkg/SwitchStack: Reserve 32B when calling C function in 64bit</title>
<updated>2023-11-03T19:41:25+00:00</updated>
<author>
<name>Ni, Ray</name>
<email>ray.ni@intel.com</email>
</author>
<published>2023-10-31T08:22:16+00:00</published>
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<id>urn:sha1:0b4acb88d67520ad5cd9fd8896db0a2e203eaca4</id>
<content type='text'>
When FSP runs in API mode, it saves the IDTR in its own stack then
switches to bootloader's stack before it returns from FspMemoryInit.
Next time when the bootloader calls TempRamExit, FSP switches to
its own stack and restores IDTR from its stack saved earlier.

However, due to a bug in BaseFspSwitchStackLib, the IDTR saved on
FSP's stack might be corrupted that results the following TempRamExit
call fails inside FSP due to PeiServices pointer cannot be retrieved
from IDT.base - 8.

The bug is the assembly code doesn't reserve 32 bytes before calling
the C routine in 64bit. According to the x86-64 calling convention,
caller is responsible for allocating 32 bytes of "shadow space" on the
stack right before calling the function (regardless of the actual
number of parameters used).

When FSP is built in optimization-off mode, the C routine makes use
of the 32-byte "shadow space" which is not reserved by the assembly
caller. That causes the IDTR saved on the stack is corrupted by the
C routine.
The patch fixes so by reserving the 32 bytes before calling C routine.

Signed-off-by: Ray Ni &lt;ray.ni@intel.com&gt;
Cc: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Reviewed-by: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Duggapu Chinni B &lt;chinni.b.duggapu@intel.com&gt;
Cc: Ray Han Lim Ng &lt;ray.han.lim.ng@intel.com&gt;
Cc: Star Zeng &lt;star.zeng@intel.com&gt;
Reviewed-by: Ted Kuo &lt;ted.kuo@intel.com&gt;
Reviewed-by: Ashraf Ali S &lt;ashraf.ali.s@intel.com&gt;
Cc: Susovan Mohapatra &lt;susovan.mohapatra@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2Pkg: Add get and set FspSmmInit upd data pointer functions</title>
<updated>2023-08-28T21:25:11+00:00</updated>
<author>
<name>Zhang, Hongbin1</name>
<email>Hongbin1.Zhang@intel.com</email>
</author>
<published>2023-08-25T03:15:22+00:00</published>
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<id>urn:sha1:b1e558f6369fc85ae053e0c16ffcd600880fe78d</id>
<content type='text'>
FSP-SMM module need get and set FspSmmInit upd data pointer functions
to get and set upd settings.

Signed-off-by: Hongbin1 Zhang &lt;hongbin1.zhang@intel.com&gt;
Cc: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Duggapu Chinni B &lt;chinni.b.duggapu@intel.com&gt;
Cc: Ray Han Lim Ng &lt;ray.han.lim.ng@intel.com&gt;
Cc: Star Zeng &lt;star.zeng@intel.com&gt;
Cc: Ted Kuo &lt;ted.kuo@intel.com&gt;
Cc: Ashraf Ali S &lt;ashraf.ali.s@intel.com&gt;
Cc: Susovan Mohapatra &lt;susovan.mohapatra@intel.com&gt;
Reviewed-by: S Ashraf Ali &lt;ashraf.ali.s@intel.com&gt;
Reviewed-by: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
</content>
</entry>
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