<feed xmlns='http://www.w3.org/2005/Atom'>
<title>Tianocore/edk2.git/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/BaseFspSwitchStackLib.inf, branch master</title>
<subtitle>EDK II (mirror)</subtitle>
<id>https://git.radix-linux.su/Tianocore/edk2.git/atom?h=master</id>
<link rel='self' href='https://git.radix-linux.su/Tianocore/edk2.git/atom?h=master'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/'/>
<updated>2024-09-11T05:45:54+00:00</updated>
<entry>
<title>IntelFsp2Pkg: Support FSP API to save and restore page table</title>
<updated>2024-09-11T05:45:54+00:00</updated>
<author>
<name>Zhiguang Liu</name>
<email>zhiguang.liu@intel.com</email>
</author>
<published>2024-06-18T08:13:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=14c9ba1a2ca64137de148968823dc20988dcaa4c'/>
<id>urn:sha1:14c9ba1a2ca64137de148968823dc20988dcaa4c</id>
<content type='text'>
A potential issue may happen when FSP creates/changes page table while
bootloader doesn't expect page table being changed in FSP.
Current, FSP API support to save/restore stack, IDT and general purpose
registers. Following the same pattern, add save/restore page table
support to solve this issue.
Note that this feature only impacts FSP API mode, and is controlled
by PCD PcdFspSaveRestorePageTableEnable. For compatibility, the PCD
default value is set as FALSE.

Signed-off-by: Zhiguang Liu &lt;zhiguang.liu@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2Pkg: BaseFspSwitchStackLib Support for X64</title>
<updated>2022-03-17T13:23:28+00:00</updated>
<author>
<name>Kuo, Ted</name>
<email>ted.kuo@intel.com</email>
</author>
<published>2022-03-14T02:48:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=411b3ff6ddb4042374a6e61285dac9f5a227f652'/>
<id>urn:sha1:411b3ff6ddb4042374a6e61285dac9f5a227f652</id>
<content type='text'>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3832
Add BaseFspSwitchStackLib Support for X64.

Cc: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Star Zeng &lt;star.zeng@intel.com&gt;
Cc: Ashraf Ali S &lt;ashraf.ali.s@intel.com&gt;
Signed-off-by: Ted Kuo &lt;ted.kuo@intel.com&gt;
Reviewed-by: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2Pkg: Replace BSD License with BSD+Patent License</title>
<updated>2019-04-09T17:58:03+00:00</updated>
<author>
<name>Michael D Kinney</name>
<email>michael.d.kinney@intel.com</email>
</author>
<published>2019-04-03T23:04:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=9672cd30563b22331bb2491377b77b57b71c52e4'/>
<id>urn:sha1:9672cd30563b22331bb2491377b77b57b71c52e4</id>
<content type='text'>
https://bugzilla.tianocore.org/show_bug.cgi?id=1373

Replace BSD 2-Clause License with BSD+Patent License.  This change is
based on the following emails:

  https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html
  https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html

RFCs with detailed process for the license change:

  V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html
  V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html
  V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Michael D Kinney &lt;michael.d.kinney@intel.com&gt;
Reviewed-by: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2Pkg/BaseFspSwitchStackLib: Remove unused PCDs</title>
<updated>2018-09-28T02:54:52+00:00</updated>
<author>
<name>shenglei</name>
<email>shenglei.zhang@intel.com</email>
</author>
<published>2018-08-28T02:01:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=dab8d71dc62d5864535afbed46eb6ae775be7b86'/>
<id>urn:sha1:dab8d71dc62d5864535afbed46eb6ae775be7b86</id>
<content type='text'>
The PCDs below are unused, so they have been removed from inf.
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry

Cc: Jiewen Yao &lt;jiewen.yao@intel.com&gt;
Cc: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Cc: Laszlo Ersek &lt;lersek@redhat.com&gt;
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei &lt;shenglei.zhang@intel.com&gt;
Reviewed-by: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2(Wrapper)Pkg: Revert from e8208100 to 737f812b</title>
<updated>2018-09-28T02:50:43+00:00</updated>
<author>
<name>Chasel, Chiu</name>
<email>chasel.chiu@intel.com</email>
</author>
<published>2018-09-28T02:31:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=ed5de31189faf5437eaa39236d178543be8baa39'/>
<id>urn:sha1:ed5de31189faf5437eaa39236d178543be8baa39</id>
<content type='text'>
Commit formats had issues so reverted 9 commits
from IntelFsp2Pkg and IntelFsp2WrapperPkg.
Will re-submit them with correct formats.

Cc: Jiewen Yao &lt;Jiewen.yao@intel.com&gt;
Cc: Star Zeng &lt;star.zeng@intel.com&gt;
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Reviewed-by: Star Zeng &lt;star.zeng@intel.com&gt;
</content>
</entry>
<entry>
<title>[PATCH v3 04/16] IntelFsp2Pkg/BaseFspSwitchStackLib: Remove unused</title>
<updated>2018-09-27T07:42:56+00:00</updated>
<author>
<name>Chasel, Chiu</name>
<email>chasel.chiu@intel.com</email>
</author>
<published>2018-09-27T07:35:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=fbb44beba048a36ce1205e960b4d3264d94584a7'/>
<id>urn:sha1:fbb44beba048a36ce1205e960b4d3264d94584a7</id>
<content type='text'>
 PCDs

The PCDs below are unused, so they have been removed from inf.
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry

Cc: Jiewen Yao &lt;jiewen.yao@intel.com&gt;
Cc: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Cc: Laszlo Ersek &lt;lersek@redhat.com&gt;
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei &lt;shenglei.zhang@intel.com&gt;
Reviewed-by: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2Pkg BaseFspSwitchStackLib: Remove MASM/GAS files</title>
<updated>2016-07-11T05:53:54+00:00</updated>
<author>
<name>Liming Gao</name>
<email>liming.gao@intel.com</email>
</author>
<published>2016-07-08T14:49:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=01dbab7048ef01554ec1fb4bdf55ae823cf97214'/>
<id>urn:sha1:01dbab7048ef01554ec1fb4bdf55ae823cf97214</id>
<content type='text'>
Keep NASM file only for new added modules.

Cc: Jiewen Yao &lt;jiewen.yao@intel.com&gt;
Cc: Giri Mudusuru &lt;giri.p.mudusuru@intel.com&gt;
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao &lt;liming.gao@intel.com&gt;
Reviewed-by: Giri P Mudusuru &lt;giri.p.mudusuru@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2Pkg BaseFspSwitchStackLib: Convert Ia32/Stack.asm to NASM</title>
<updated>2016-06-28T01:52:03+00:00</updated>
<author>
<name>Liming Gao</name>
<email>liming.gao@intel.com</email>
</author>
<published>2016-06-08T09:00:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=4c42aaff8bd861d69b7cbec0967324f74040103a'/>
<id>urn:sha1:4c42aaff8bd861d69b7cbec0967324f74040103a</id>
<content type='text'>
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert
Ia32/Stack.asm to Ia32/Stack.nasm

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao &lt;liming.gao@intel.com&gt;
</content>
</entry>
<entry>
<title>Add IntelFsp2Pkg and IntelFsp2WrapperPkg.</title>
<updated>2016-05-13T05:00:53+00:00</updated>
<author>
<name>Jiewen Yao</name>
<email>jiewen.yao@intel.com</email>
</author>
<published>2016-05-13T05:00:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=cf1d454983fb4fd3b580a92bd242310467a5eaef'/>
<id>urn:sha1:cf1d454983fb4fd3b580a92bd242310467a5eaef</id>
<content type='text'>
Add FSP2.0 support.
This series of patch is to support FSP2.0 specification at
https://firmware.intel.com/sites/default/files/FSP_EAS_v2.0_Draft%20External.pdf

Some major updates include:
1) One FSP binary is separated to multiple components:
FSP-T, FSP-M, FSP-S, and optional FSP-O.
Each component has its own configuration data region.
2) All FSP-APIs use same UPD format - FSP_UPD_HEADER.
3) Add EnumInitPhaseEndOfFirmware notifyphase.
4) FSP1.1/FSP1.0 compatibility is NOT maintained.
5) We also add rename Fsp* to FspWrapper* in IntelFsp2WrapperPkg,
to indicate that it is for FspWrapper only.

IntelFspPkg and IntelFspWrapperPkg will be deprecated.
The new Intel platform will follow FSP2.0 and use IntelFsp2Pkg
and IntelFsp2WrapperPkg.
The old platform can still use IntelFspPkg and IntelFspWrapperPkg
for compatibility consideration.

Cc: Giri P Mudusuru &lt;giri.p.mudusuru@intel.com&gt;
Cc: Maurice Ma &lt;maurice.ma@intel.com&gt;
Cc: Ravi P Rangarajan &lt;ravi.p.rangarajan@intel.com&gt;
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao &lt;jiewen.yao@intel.com&gt;
Reviewed-by: Giri P Mudusuru &lt;giri.p.mudusuru@intel.com&gt;
Reviewed-by: Maurice Ma &lt;maurice.ma@intel.com&gt;
Reviewed-by: Ravi P Rangarajan &lt;ravi.p.rangarajan@intel.com&gt;
</content>
</entry>
</feed>
