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<title>Tianocore/edk2.git/IntelFsp2Pkg/Library/BaseFspPlatformLib, branch master</title>
<subtitle>EDK II (mirror)</subtitle>
<id>https://git.radix-linux.su/Tianocore/edk2.git/atom?h=master</id>
<link rel='self' href='https://git.radix-linux.su/Tianocore/edk2.git/atom?h=master'/>
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<updated>2024-04-09T17:15:10+00:00</updated>
<entry>
<title>IntelFsp2Pkg: Fsp T new ARCH UPD Support</title>
<updated>2024-04-09T17:15:10+00:00</updated>
<author>
<name>Duggapu Chinni B</name>
<email>chinni.b.duggapu@intel.com</email>
</author>
<published>2024-04-05T04:00:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=543add1d414f6016829f7d706fdefb3b830020ef'/>
<id>urn:sha1:543add1d414f6016829f7d706fdefb3b830020ef</id>
<content type='text'>
Changes to support spec changes

1. Remove usage of Pcd.
2. Change code to validate the Temporary Ram size input.
3. Consume the input saved in YMM Register

Cc: Sai Chaganty &lt;rangasai.v.chaganty@intel.com&gt;
Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Chiu Chasel &lt;chasel.chiu@intel.com&gt;
Cc: Duggapu Chinni B &lt;chinni.b.duggapu@intel.com&gt;
Cc: Ni Ray &lt;ray.ni@intel.com&gt;

Signed-off-by: Duggapu Chinni B &lt;chinni.b.duggapu@intel.com&gt;
Reviewed-by: Chiu Chasel &lt;chasel.chiu@intel.com&gt;
Reviewed-by: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2Pkg: Fix GCC Compiler warning.</title>
<updated>2023-03-10T02:04:51+00:00</updated>
<author>
<name>S, Ashraf Ali</name>
<email>ashraf.ali.s@intel.com</email>
</author>
<published>2023-03-09T16:05:57+00:00</published>
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<id>urn:sha1:8820767fb3bad09eeedecc3030d75c9e0cd4cab7</id>
<content type='text'>
Function definition should match with declaration.
[-Wlto-type-mismatch]

Cc: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Sai Chaganty &lt;rangasai.v.chaganty@intel.com&gt;
Cc: Star Zeng &lt;star.zeng@intel.com&gt;
Signed-off-by: Ashraf Ali S &lt;ashraf.ali.s@intel.com&gt;
Reviewed-by: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Reviewed-by: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Reviewed-by: Sai Chaganty &lt;rangasai.v.chaganty@intel.com&gt;
Reviewed-by: Star Zeng &lt;star.zeng@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2Pkg: Apply uncrustify changes</title>
<updated>2021-12-07T17:24:28+00:00</updated>
<author>
<name>Michael Kubacki</name>
<email>michael.kubacki@microsoft.com</email>
</author>
<published>2021-12-05T22:53:59+00:00</published>
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<id>urn:sha1:111f2228ddf487b0ac3491e416bb3dcdcfa4f979</id>
<content type='text'>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the IntelFsp2Pkg package

Cc: Andrew Fish &lt;afish@apple.com&gt;
Cc: Leif Lindholm &lt;leif@nuviainc.com&gt;
Cc: Michael D Kinney &lt;michael.d.kinney@intel.com&gt;
Signed-off-by: Michael Kubacki &lt;michael.kubacki@microsoft.com&gt;
Reviewed-by: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2Pkg: Replace BSD License with BSD+Patent License</title>
<updated>2019-04-09T17:58:03+00:00</updated>
<author>
<name>Michael D Kinney</name>
<email>michael.d.kinney@intel.com</email>
</author>
<published>2019-04-03T23:04:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=9672cd30563b22331bb2491377b77b57b71c52e4'/>
<id>urn:sha1:9672cd30563b22331bb2491377b77b57b71c52e4</id>
<content type='text'>
https://bugzilla.tianocore.org/show_bug.cgi?id=1373

Replace BSD 2-Clause License with BSD+Patent License.  This change is
based on the following emails:

  https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html
  https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html

RFCs with detailed process for the license change:

  V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html
  V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html
  V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Michael D Kinney &lt;michael.d.kinney@intel.com&gt;
Reviewed-by: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2Pkg: Support FSP Dispatch mode</title>
<updated>2018-10-19T07:01:00+00:00</updated>
<author>
<name>Chasel, Chiu</name>
<email>chasel.chiu@intel.com</email>
</author>
<published>2018-10-11T13:22:12+00:00</published>
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<id>urn:sha1:a2e61f341d26a78751b2f19b5004c6bbfc8b4fa9</id>
<content type='text'>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1241

Add support for both API (original mode) and DISPATCH mode:
1. Add FspMode field from reserved byte of Global
   Data Structure to tell which mode is selected by boot
   loader. If boot loader invoking FSP-M API this field
   will remain as default 0 (API mode), otherwise platform
   FSP should set this field to 1 (Dispatch mode) when
   initializing Global Data Structure.
2. gFspInApiModePpiGuid will be instaled when FSP running in API
   mode and modules only for API mode should have this in depex.
3. If it is DISPATCH mode, FSP will return to PEI dispatcher,
   not directly return to boot loader.
4. DISPATCH mode supports DXE NotifyPhase drivers so FSP
   will not wait for PEI NotifyPhase callbacks, instead it
   will install gFspReadyForNotifyPhasePpiGuid PPI for
   platform to complete late initialization before transferring
   to DXE.

Test: Verified FSP API and DISPATCH modes on 2 internal
      platforms and both boot successfully.

Cc: Jiewen Yao &lt;Jiewen.yao@intel.com&gt;
Cc: Desimone Nathaniel L &lt;nathaniel.l.desimone@intel.com&gt;
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Reviewed-by: Jiewen Yao &lt;Jiewen.yao@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2Pkg/BaseFspPlatformLib: Remove unused PCDs</title>
<updated>2018-09-28T02:54:42+00:00</updated>
<author>
<name>shenglei</name>
<email>shenglei.zhang@intel.com</email>
</author>
<published>2018-08-28T02:00:10+00:00</published>
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<id>urn:sha1:06e88b8bfbfd9efdebd732831a56584eb3fd4e1a</id>
<content type='text'>
The PCDs below are unused, so they have been removed from inf.
gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize
gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry

Cc: Jiewen Yao &lt;jiewen.yao@intel.com&gt;
Cc: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Cc: Laszlo Ersek &lt;lersek@redhat.com&gt;
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei &lt;shenglei.zhang@intel.com&gt;
Reviewed-by: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2(Wrapper)Pkg: Revert from e8208100 to 737f812b</title>
<updated>2018-09-28T02:50:43+00:00</updated>
<author>
<name>Chasel, Chiu</name>
<email>chasel.chiu@intel.com</email>
</author>
<published>2018-09-28T02:31:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=ed5de31189faf5437eaa39236d178543be8baa39'/>
<id>urn:sha1:ed5de31189faf5437eaa39236d178543be8baa39</id>
<content type='text'>
Commit formats had issues so reverted 9 commits
from IntelFsp2Pkg and IntelFsp2WrapperPkg.
Will re-submit them with correct formats.

Cc: Jiewen Yao &lt;Jiewen.yao@intel.com&gt;
Cc: Star Zeng &lt;star.zeng@intel.com&gt;
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Reviewed-by: Star Zeng &lt;star.zeng@intel.com&gt;
</content>
</entry>
<entry>
<title>[PATCH v3 03/16] IntelFsp2Pkg/BaseFspPlatformLib: Remove unused PCDs</title>
<updated>2018-09-27T07:42:56+00:00</updated>
<author>
<name>Chasel, Chiu</name>
<email>chasel.chiu@intel.com</email>
</author>
<published>2018-09-27T07:32:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=54611eacfe655cee4327c921b64224a194169faa'/>
<id>urn:sha1:54611eacfe655cee4327c921b64224a194169faa</id>
<content type='text'>
The PCDs below are unused, so they have been removed from inf.
gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize
gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry

Cc: Jiewen Yao &lt;jiewen.yao@intel.com&gt;
Cc: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Cc: Laszlo Ersek &lt;lersek@redhat.com&gt;
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei &lt;shenglei.zhang@intel.com&gt;
Reviewed-by: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2Pkg: Clean up source files</title>
<updated>2018-06-28T03:19:43+00:00</updated>
<author>
<name>Liming Gao</name>
<email>liming.gao@intel.com</email>
</author>
<published>2018-06-27T13:07:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=e37bb20c7b4e63de1664edae19afc7c1a95853fa'/>
<id>urn:sha1:e37bb20c7b4e63de1664edae19afc7c1a95853fa</id>
<content type='text'>
1. Do not use tab characters
2. No trailing white space in one line
3. All files must end with CRLF

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao &lt;liming.gao@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2Pkg: Support to return error status from FSP API done</title>
<updated>2016-11-14T04:11:05+00:00</updated>
<author>
<name>Thomaiyar, Richard Marian</name>
<email>richard.marian.thomaiyar@intel.com</email>
</author>
<published>2016-11-08T09:45:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=f56ae7bf82bf32dd0ec9cafb9f632511813c823e'/>
<id>urn:sha1:f56ae7bf82bf32dd0ec9cafb9f632511813c823e</id>
<content type='text'>
Added FspMemoryInitDone2, FspTempRamExitDone2, FspSiliconInitDone2
to return error status to Boot Loader for FSP API calls.
To maintain backward compatibility existing functions
(FspMemoryInitDone, FspTempRamExitDone, FspSiliconInitDone)
declaration left untouched.

Cc: Maurice Ma &lt;maurice.ma@intel.com&gt;
Cc: Jiewen Yao &lt;jiewen.yao@intel.com&gt;
Cc: Giri P Mudusuru &lt;giri.p.mudusuru@intel.com&gt;
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Richard Thomaiyar &lt;richard.marian.thomaiyar@intel.com&gt;
Reviewed-by: Jiewen Yao &lt;jiewen.yao@intel.com&gt;
Reviewed-by: Giri P Mudusuru &lt;giri.p.mudusuru@intel.com&gt;
</content>
</entry>
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