Tianocore/edk2.git/IntelFsp2Pkg/Include, branch master

IntelFsp2Pkg: Replace include guards with #pragma once

2026-02-23T21:01:28+00:00

Replace traditional `#ifndef`/`#define`/`#endif` include guards with `#pragma` once. `#pragma once` is a widely supported preprocessor directive that prevents header files from being included multiple times. It is supported by all toolchains used to build edk2: GCC, Clang/LLVM, and MSVC. Compared to macro-based include guards, `#pragma once`: - Eliminates the risk of macro name collisions or copy/paste errors where two headers inadvertently use the same guard macro. - Eliminate inconsistency in the way include guard macros are named (e.g., some files use `__FILE_H__`, others use `FILE_H_`, etc.). - Reduces boilerplate (three lines replaced by one). - Avoids polluting the macro namespace with guard symbols. - Can improve build times as the preprocessor can skip re-opening the file entirely, rather than re-reading it to find the matching `#endif` ("multiple-include optimization"). - Note that some compilers may already optimize traditional include guards, by recognzining the idiomatic pattern. This change is made acknowledging that overall portability of the code will technically be reduced, as `#pragma once` is not part of the C/C++ standards. However, this is considered acceptable given: 1. edk2 already defines a subset of supported compilers in BaseTools/Conf/tools_def.template, all of which have supported `#pragma once` for over two decades. 2. There have been concerns raised to the project about inconsistent include guard naming and potential macro collisions. Approximate compiler support dates: - MSVC: Supported since Visual C++ 4.2 (1996) - GCC: Supported since 3.4 (2004) (http://gnu.ist.utl.pt/software/gcc/gcc-3.4/changes.html) - Clang (LLVM based): Since initial release in 2007 Signed-off-by: Michael Kubacki

IntelFsp2Pkg: Correct ApiIdx type

2025-11-23T01:55:17+00:00

For function FspMultiPhasePlatformGetNumberOfPhases, the type of ApiIdx is not aligned in header file and c function, correct and make it align. Signed-off-by: Hongbin1 Zhang Cc: Ray Ni Cc: Star Zeng Cc: Chasel Chiu Cc: Nate DeSimone Cc: Ted Kuo Cc: Ashraf Ali S

IntelFsp2Pkg/FspCommonLib: Remove unused API SetFspCoreStackPointer()

2025-07-16T06:47:27+00:00

Signed-off-by: Ray Ni Cc: Chasel Chiu Cc: Nate DeSimone Cc: Star Zeng Cc: Ted Kuo Cc: Ashraf Ali S

IntelFsp2Pkg : Add FSP-I arch config PPI

2024-12-20T07:40:28+00:00

Add FSP-I arch config PPI header file and GUID for supporting FSP-I to get Bootloader MM FV address and length, Bootloader MM FV context Data address and length under dispatch mode Signed-off-by: Hongbin1 Zhang Cc: Chasel Chiu Cc: Ray Ni Cc: Star Zeng Cc: Jiaxin Wu Cc: Duggapu Chinni B Cc: Ted Kuo Cc: Ashraf Ali S Cc: Nate DeSimone

IntelFsp2Pkg : Add fsp status code for fspsmm init

2024-12-20T06:29:58+00:00

Add fsp status code for fspsmm init interface. Signed-off-by: Hongbin1 Zhang Cc: Chasel Chiu Cc: Nate DeSimone Cc: Duggapu Chinni B Cc: Star Zeng Cc: Ted Kuo Cc: Ashraf Ali S Cc: Ray Ni

IntelFsp2Pkg: Fsp T new ARCH UPD Support

2024-04-09T17:15:10+00:00

Changes to support spec changes 1. Remove usage of Pcd. 2. Change code to validate the Temporary Ram size input. 3. Consume the input saved in YMM Register Cc: Sai Chaganty Cc: Nate DeSimone Cc: Chiu Chasel Cc: Duggapu Chinni B Cc: Ni Ray Signed-off-by: Duggapu Chinni B Reviewed-by: Chiu Chasel Reviewed-by: Nate DeSimone

IntelFsp2Pkg: Add get and set FspSmmInit upd data pointer functions

2023-08-28T21:25:11+00:00

FSP-SMM module need get and set FspSmmInit upd data pointer functions to get and set upd settings. Signed-off-by: Hongbin1 Zhang Cc: Chasel Chiu Cc: Nate DeSimone Cc: Duggapu Chinni B Cc: Ray Han Lim Ng Cc: Star Zeng Cc: Ted Kuo Cc: Ashraf Ali S Cc: Susovan Mohapatra Reviewed-by: S Ashraf Ali Reviewed-by: Chasel Chiu

IntelFsp2Pkg: TempRamInit API should preserve EBX/RBX register.

2023-04-04T16:39:41+00:00

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4395 FSP specification defines the TempRamInit API preserved register list which including EBX/RBX, however current implementation unexpectedly overriding EBX/RBX register that should be fixed. Cc: Nate DeSimone Cc: Star Zeng Signed-off-by: Chasel Chiu Reviewed-by: Nate DeSimone

IntelFsp2Pkg: Update Function header to support IA32/X64.

2022-11-02T18:33:31+00:00

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4126 Common functions will have either 32bit or 64bit instances which having different return code size. Function header should support both scenarios. Cc: Nate DeSimone Cc: Star Zeng Signed-off-by: Chasel Chiu Reviewed-by: Nate DeSimone

IntelFsp2Pkg: Fix code formatting errors

2022-10-04T16:53:59+00:00

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4048 This package did not have CI enabled so code changes were merged that fail uncrustify formatting. This change updates those files to include uncustify formatting. Cc: Chasel Chiu Cc: Nate DeSimone Cc: Star Zeng Signed-off-by: Michael Kubacki Reviewed-by: Chasel Chiu Reviewed-by: Michael D Kinney