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<title>Tianocore/edk2.git/IntelFsp2Pkg/Include/Library, branch dependabot/github_actions/actions/setup-python-6</title>
<subtitle>EDK II (mirror)</subtitle>
<id>https://git.radix-linux.su/Tianocore/edk2.git/atom?h=dependabot%2Fgithub_actions%2Factions%2Fsetup-python-6</id>
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<updated>2025-07-16T06:47:27+00:00</updated>
<entry>
<title>IntelFsp2Pkg/FspCommonLib: Remove unused API SetFspCoreStackPointer()</title>
<updated>2025-07-16T06:47:27+00:00</updated>
<author>
<name>Ray Ni</name>
<email>ray.ni@intel.com</email>
</author>
<published>2025-07-14T07:48:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=36b63e9fc87e4494067fb2cfa702449cfbb55b86'/>
<id>urn:sha1:36b63e9fc87e4494067fb2cfa702449cfbb55b86</id>
<content type='text'>
Signed-off-by: Ray Ni &lt;ray.ni@intel.com&gt;
Cc: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Star Zeng &lt;star.zeng@intel.com&gt;
Cc: Ted Kuo &lt;ted.kuo@intel.com&gt;
Cc: Ashraf Ali S &lt;ashraf.ali.s@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2Pkg: Fsp T new ARCH UPD Support</title>
<updated>2024-04-09T17:15:10+00:00</updated>
<author>
<name>Duggapu Chinni B</name>
<email>chinni.b.duggapu@intel.com</email>
</author>
<published>2024-04-05T04:00:48+00:00</published>
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<id>urn:sha1:543add1d414f6016829f7d706fdefb3b830020ef</id>
<content type='text'>
Changes to support spec changes

1. Remove usage of Pcd.
2. Change code to validate the Temporary Ram size input.
3. Consume the input saved in YMM Register

Cc: Sai Chaganty &lt;rangasai.v.chaganty@intel.com&gt;
Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Chiu Chasel &lt;chasel.chiu@intel.com&gt;
Cc: Duggapu Chinni B &lt;chinni.b.duggapu@intel.com&gt;
Cc: Ni Ray &lt;ray.ni@intel.com&gt;

Signed-off-by: Duggapu Chinni B &lt;chinni.b.duggapu@intel.com&gt;
Reviewed-by: Chiu Chasel &lt;chasel.chiu@intel.com&gt;
Reviewed-by: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2Pkg: Add get and set FspSmmInit upd data pointer functions</title>
<updated>2023-08-28T21:25:11+00:00</updated>
<author>
<name>Zhang, Hongbin1</name>
<email>Hongbin1.Zhang@intel.com</email>
</author>
<published>2023-08-25T03:15:22+00:00</published>
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<id>urn:sha1:b1e558f6369fc85ae053e0c16ffcd600880fe78d</id>
<content type='text'>
FSP-SMM module need get and set FspSmmInit upd data pointer functions
to get and set upd settings.

Signed-off-by: Hongbin1 Zhang &lt;hongbin1.zhang@intel.com&gt;
Cc: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Duggapu Chinni B &lt;chinni.b.duggapu@intel.com&gt;
Cc: Ray Han Lim Ng &lt;ray.han.lim.ng@intel.com&gt;
Cc: Star Zeng &lt;star.zeng@intel.com&gt;
Cc: Ted Kuo &lt;ted.kuo@intel.com&gt;
Cc: Ashraf Ali S &lt;ashraf.ali.s@intel.com&gt;
Cc: Susovan Mohapatra &lt;susovan.mohapatra@intel.com&gt;
Reviewed-by: S Ashraf Ali &lt;ashraf.ali.s@intel.com&gt;
Reviewed-by: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2Pkg: Update Function header to support IA32/X64.</title>
<updated>2022-11-02T18:33:31+00:00</updated>
<author>
<name>Chasel Chiu</name>
<email>chasel.chiu@intel.com</email>
</author>
<published>2022-10-28T02:37:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=c46204e25f5b929fae2b336c03c73fada632d4f4'/>
<id>urn:sha1:c46204e25f5b929fae2b336c03c73fada632d4f4</id>
<content type='text'>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4126

Common functions will have either 32bit or 64bit instances which
having different return code size. Function header should support both
scenarios.

Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Star Zeng &lt;star.zeng@intel.com&gt;
Signed-off-by: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Reviewed-by: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2Pkg: Add FSP 2.4 MultiPhase interface.</title>
<updated>2022-08-31T16:48:07+00:00</updated>
<author>
<name>Chasel Chiu</name>
<email>chasel.chiu@intel.com</email>
</author>
<published>2022-07-25T19:03:51+00:00</published>
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<id>urn:sha1:df25a5457f04ec465dce97428cfee96f462676e7</id>
<content type='text'>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3916

Provide FSP 2.4 MultiPhase interface and scripts
support.

Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Star Zeng &lt;star.zeng@intel.com&gt;
Signed-off-by: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Reviewed-by: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2Pkg: Support 64bit FspResetType for X64 build.</title>
<updated>2022-07-19T22:24:31+00:00</updated>
<author>
<name>Chasel Chiu</name>
<email>chasel.chiu@intel.com</email>
</author>
<published>2022-07-19T03:28:17+00:00</published>
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<id>urn:sha1:140446cd595cad870a0e8cef7a367bae8f09effa</id>
<content type='text'>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3999
FspResetType will be either 32bit or 64 bit basing on
the build type.

Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Star Zeng &lt;star.zeng@intel.com&gt;
Signed-off-by: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Reviewed-by: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2Pkg: BaseFspCommonLib Support for X64</title>
<updated>2022-03-22T07:56:09+00:00</updated>
<author>
<name>Kuo, Ted</name>
<email>ted.kuo@intel.com</email>
</author>
<published>2022-03-14T04:22:38+00:00</published>
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<id>urn:sha1:ec0b54849b23efa25caf0055b0eef8bf9b4dec98</id>
<content type='text'>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3867
Add BaseFspCommonLib Support for X64.

Cc: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Star Zeng &lt;star.zeng@intel.com&gt;
Cc: Ashraf Ali S &lt;ashraf.ali.s@intel.com&gt;
Signed-off-by: Ted Kuo &lt;ted.kuo@intel.com&gt;
Reviewed-by: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2Pkg: Apply uncrustify changes</title>
<updated>2021-12-07T17:24:28+00:00</updated>
<author>
<name>Michael Kubacki</name>
<email>michael.kubacki@microsoft.com</email>
</author>
<published>2021-12-05T22:53:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=111f2228ddf487b0ac3491e416bb3dcdcfa4f979'/>
<id>urn:sha1:111f2228ddf487b0ac3491e416bb3dcdcfa4f979</id>
<content type='text'>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the IntelFsp2Pkg package

Cc: Andrew Fish &lt;afish@apple.com&gt;
Cc: Leif Lindholm &lt;leif@nuviainc.com&gt;
Cc: Michael D Kinney &lt;michael.d.kinney@intel.com&gt;
Signed-off-by: Michael Kubacki &lt;michael.kubacki@microsoft.com&gt;
Reviewed-by: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2Pkg: Add FunctionParametePtr to FspGlobalData.</title>
<updated>2020-05-21T01:25:26+00:00</updated>
<author>
<name>Chasel Chiu</name>
<email>chasel.chiu@intel.com</email>
</author>
<published>2020-05-20T03:23:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=3f89db869028fa65a37756fd7f391cbd69f4579c'/>
<id>urn:sha1:3f89db869028fa65a37756fd7f391cbd69f4579c</id>
<content type='text'>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2726

When FSP switching stack and calling bootloader functions,
the function parameter in stack may not be accessible easily.
We can store the function parameter pointer to FspGlobalData
and retrieve it after stack switched.

Also need to add Loader2PeiSwitchStack () to header file
as public function for platform FSP code to consume.

Cc: Maurice Ma &lt;maurice.ma@intel.com&gt;
Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Star Zeng &lt;star.zeng@intel.com&gt;
Signed-off-by: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Reviewed-by: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
</content>
</entry>
<entry>
<title>IntelFsp2Pkg: Support Multi-Phase SiInit and debug handlers.</title>
<updated>2020-05-14T12:34:01+00:00</updated>
<author>
<name>Chasel Chiu</name>
<email>chasel.chiu@intel.com</email>
</author>
<published>2020-04-30T01:28:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=f2cdb268ef04eeec51948b5d81eeca5cab5ed9af'/>
<id>urn:sha1:f2cdb268ef04eeec51948b5d81eeca5cab5ed9af</id>
<content type='text'>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2698

To enhance FSP silicon initialization flexibility an optional
Multi-Phase API is introduced and FSP header needs update for
new API offset. Also new SecCore module created for
FspMultiPhaseSiInit API

New ARCH_UPD introduced for enhancing FSP debug message
flexibility now bootloader can pass its own debug handler
function pointer and FSP will call the function to handle
debug message.
To support calling bootloader functions, a FspGlobalData field
added to indicate if FSP needs to switch stack when FSP running
on separate stack from bootloader.

Cc: Maurice Ma &lt;maurice.ma@intel.com&gt;
Cc: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
Cc: Star Zeng &lt;star.zeng@intel.com&gt;
Signed-off-by: Chasel Chiu &lt;chasel.chiu@intel.com&gt;
Reviewed-by: Nate DeSimone &lt;nathaniel.l.desimone@intel.com&gt;
</content>
</entry>
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