Tianocore/edk2.git/IntelFsp2Pkg/FspSecCore, branch dependabot/github_actions/actions/setup-python-6

IntelFsp2Pkg: Preserve GDTR and CS/DS/ES/FS/GS/SS

2025-07-18T06:21:48+00:00

Bootloader does not expect FSP modifies GDTR and segment selectors, update FSP entry/exit code to preserve these registers. Signed-off-by: Ray Ni Cc: Chasel Chiu Cc: Nate DeSimone Cc: Star Zeng Cc: Ted Kuo Cc: Ashraf Ali S

IntelFsp2Pkg : Set FSP-I upd data pointer to NULL as default

2025-02-27T16:34:33+00:00

FSP-I upd data pointer should be set NULL as default, it could avoid other code to use it before it was set with correct pointer. Signed-off-by: Hongbin1 Zhang Cc: Chasel Chiu Cc: Ray Ni Cc: Star Zeng Cc: Jiaxin Wu Cc: Duggapu Chinni B Cc: Ted Kuo Cc: Ashraf Ali S Cc: Nate DeSimone

IntelFsp2Pkg/FspSecCore: Update FSP global data in FSP-S/I entry

2025-02-25T04:19:37+00:00

Today when FspSiliconInit/FspSmmInit is called, the corresponding FSP-S/I UPD pointer is saved in FSP_GLOBAL_DATA by gen-specific code. Such code might be duplicated between different gens of FSP implementation. The change is to update FspSecCore module to set the UPD pointer in FSP_GLOBAL_DATA for all API calls: * FspMemoryInit * FspSiliconInit * FspSmmInit This can eliminate the gen-specific code. Signed-off-by: Ray Ni Cc: Chasel Chiu Cc: Nate DeSimone Cc: Duggapu Chinni B Cc: Star Zeng Cc: Ted Kuo Cc: Ashraf Ali S

IntelFsp2Pkg/FspSecCore: initialize FspMode in FSP_GLOBAL_DATA

2025-02-24T02:36:58+00:00

FspSecCore only runs in API mode. When it allocates memory in stack for FSP_GLOBAL_DATA, it does not initialize the FspMode to FSP_IN_API_MODE. The patch enhances the code to initialize the FspMode as well. This change does not have functionality impact as there should be some code elsewhere which sets the FspMode. This change allows to remove the extra code logic that sets FspMode in API mode. Signed-off-by: Ray Ni Cc: Chasel Chiu Cc: Nate DeSimone Cc: Duggapu Chinni B Cc: Star Zeng Cc: Ted Kuo Cc: Ashraf Ali S

IntelFsp2Pkg: Fixing TemporaryRamSize Configurability option.

2025-02-21T17:57:46+00:00

Issue : Configuring TemporaryRamSize using FSP-T arch UPD (added as part of Spec 2.5) is not working as expected. Root cause : Code is reading the ImageAttribute from the wrong address which confirms the TemporaryRamSize Configurability, hence the TemporaryRamSize UPD is ignored. This is because the code expects the FspInfoheader Offset to be in ESI/RSI (from which ImageAttribute read) is not guaranteed as per the current implementation. Fix : Modified code to make sure that ESI/RSI contains the FspInfoheader offset by time the code reads the ImageAttribute. Tests : Verified the fix on Both 32 Bit and 64 Bit FSP Binaries by configuring the TemporaryRamSize using the FSPT Arch UPD. Signed-off-by: Aravind P R

MdePkg: Move StackCheckLibStaticInit to StackCheckLib

2025-02-07T02:23:11+00:00

This commit oves StackCheckLib from a NULL lib to an instance of StackCheckLib. This requires every entry point to add a library dependency on StackCheckLib. It also requires every SEC module to have a dependency on StackCheckLib because there is no standard SEC entry point. It allows for greater flexibility for a platform to apply stack cookies and simplifies DSC logic. Continuous-integration-options: PatchCheck.ignore-multi-package Signed-off-by: Oliver Smith-Denny

IntelFsp2Pkg: Support FSP API to save and restore page table

2024-09-11T05:45:54+00:00

A potential issue may happen when FSP creates/changes page table while bootloader doesn't expect page table being changed in FSP. Current, FSP API support to save/restore stack, IDT and general purpose registers. Following the same pattern, add save/restore page table support to solve this issue. Note that this feature only impacts FSP API mode, and is controlled by PCD PcdFspSaveRestorePageTableEnable. For compatibility, the PCD default value is set as FALSE. Signed-off-by: Zhiguang Liu

IntelFsp2Pkg: Align FSP global data pointer for X64 build

2024-08-28T13:40:56+00:00

When it used 32 bits for set FSP global data pointer under X64 build, it should get FSP global data pointer with 32 bits data under X64 build. Signed-off-by: Hongbin1 Zhang Cc: Chasel Chiu Cc: Nate DeSimone Cc: Duggapu Chinni B Cc: Star Zeng Cc: Ted Kuo Cc: Ashraf Ali S

IntelFsp2Pkg: Correcting Data Region Length of MCUD section

2024-08-27T20:01:54+00:00

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4793 MCUD Data Region Length(DATA_LEN_OF_MCUD) pushed to stack is incorrect for 64-bit. The Data occupied by MCUD section is 32 bytes in 64-bit instead of 16 bytes in 32-bit. This commit inputs the correct the Data Region Length for the MCUD Section and also corrects the code that retrieves this data. Signed-off-by: Aravind P R

IntelFsp2Pkg: Fsp T new ARCH UPD Support

2024-04-09T17:15:10+00:00

Changes to support spec changes 1. Remove usage of Pcd. 2. Change code to validate the Temporary Ram size input. 3. Consume the input saved in YMM Register Cc: Sai Chaganty Cc: Nate DeSimone Cc: Chiu Chasel Cc: Duggapu Chinni B Cc: Ni Ray Signed-off-by: Duggapu Chinni B Reviewed-by: Chiu Chasel Reviewed-by: Nate DeSimone