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<title>Tianocore/edk2.git/DynamicTablesPkg/Library/Acpi, branch dependabot/github_actions/actions/github-script-9</title>
<subtitle>EDK II (mirror)</subtitle>
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<updated>2026-04-30T10:31:01+00:00</updated>
<entry>
<title>DynamicTablesPkg: add Hest table generator</title>
<updated>2026-04-30T10:31:01+00:00</updated>
<author>
<name>Yeoreum Yun</name>
<email>yeoreum.yun@arm.com</email>
</author>
<published>2026-03-01T12:44:49+00:00</published>
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<id>urn:sha1:d8b163508842d80041d2037e640127473c0b7cf9</id>
<content type='text'>
Add ACPI Hardware Error Source Table (HEST) generator.

Signed-off-by: Yeoreum Yun &lt;yeoreum.yun@arm.com&gt;
</content>
</entry>
<entry>
<title>DynamicTablesPkg: AcpiIortLibArm: Support SMMUv3 revision 5</title>
<updated>2026-04-28T09:03:21+00:00</updated>
<author>
<name>Kun Qin</name>
<email>kuqin@microsoft.com</email>
</author>
<published>2026-03-06T22:07:57+00:00</published>
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<id>urn:sha1:99148f1df88440b884dbac89bf135b57308bd4ef</id>
<content type='text'>
This change modified the SMMUv3 node logic to add a specific condition
for revision 05 and a default branch for setting revision 5.

It also adds a validity check for the IORT references when device ID
valid bit is set in the flag.

Co-authored-by: Ronny Hansen &lt;Hansen.Ronny@microsoft.com&gt;
Signed-off-by: Kun Qin &lt;kun.qin@microsoft.com&gt;
</content>
</entry>
<entry>
<title>DynamicTablesPkg: AcpiIortLibArm: Support IORT revision 6</title>
<updated>2026-04-28T09:03:21+00:00</updated>
<author>
<name>Ronny Hansen</name>
<email>Hansen.Ronny@microsoft.com</email>
</author>
<published>2025-10-28T13:33:18+00:00</published>
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<id>urn:sha1:56a250ad9f849ae7f68b5c6516c8ebcc22059e48</id>
<content type='text'>
This change updated the ACPI IORT generator’s supported revision from
`EFI_ACPI_IO_REMAPPING_TABLE_REVISION_05` to
`EFI_ACPI_IO_REMAPPING_TABLE_REVISION_06`.

Signed-off-by: Kun Qin &lt;kun.qin@microsoft.com&gt;
</content>
</entry>
<entry>
<title>DynamicTablesPkg: Replace include guards with #pragma once</title>
<updated>2026-02-23T21:01:28+00:00</updated>
<author>
<name>Michael Kubacki</name>
<email>michael.kubacki@microsoft.com</email>
</author>
<published>2026-02-03T17:36:36+00:00</published>
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<id>urn:sha1:01f75b3927b8d98fa0a6fbfb6a79420985f107f0</id>
<content type='text'>
Replace traditional `#ifndef`/`#define`/`#endif` include guards with
`#pragma` once.

`#pragma once` is a widely supported preprocessor directive that
prevents header files from being included multiple times. It is
supported by all toolchains used to build edk2: GCC, Clang/LLVM, and
MSVC.

Compared to macro-based include guards, `#pragma once`:

- Eliminates the risk of macro name collisions or copy/paste errors
  where two headers inadvertently use the same guard macro.
- Eliminate inconsistency in the way include guard macros are named
  (e.g., some files use `__FILE_H__`, others use `FILE_H_`, etc.).
- Reduces boilerplate (three lines replaced by one).
- Avoids polluting the macro namespace with guard symbols.
- Can improve build times as the preprocessor can skip re-opening the
  file entirely, rather than re-reading it to find the matching
  `#endif` ("multiple-include optimization").
  - Note that some compilers may already optimize traditional include
    guards, by recognzining the idiomatic pattern.

This change is made acknowledging that overall portability of the
code will technically be reduced, as `#pragma once` is not part of the
C/C++ standards.

However, this is considered acceptable given:

1. edk2 already defines a subset of supported compilers in
   BaseTools/Conf/tools_def.template, all of which have supported
   `#pragma once` for over two decades.
2. There have been concerns raised to the project about inconsistent
   include guard naming and potential macro collisions.

Approximate compiler support dates:

- MSVC: Supported since Visual C++ 4.2 (1996)
- GCC: Supported since 3.4 (2004)
  (http://gnu.ist.utl.pt/software/gcc/gcc-3.4/changes.html)
- Clang (LLVM based): Since initial release in 2007

Signed-off-by: Michael Kubacki &lt;michael.kubacki@microsoft.com&gt;
</content>
</entry>
<entry>
<title>DynamicTablesPkg: add SSDT DMC620 PMU table generator</title>
<updated>2026-01-16T10:35:45+00:00</updated>
<author>
<name>Sughosh Ganu</name>
<email>sughosh.ganu@arm.com</email>
</author>
<published>2025-10-22T07:32:40+00:00</published>
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<id>urn:sha1:b1707d99ae05b7e3f70b28fee830fbad131de5b5</id>
<content type='text'>
The Generic ACPI for Arm Components 1.2 Platform Design Document [1],
section 2.6.1.2 "ASL reference code for the DMC620 PMU" provides
information to describe the Arm Corelink DMC620 Dynamic Memory
Controller's Performance Monitoring Unit (PMU) block using an ASL
definition block table.

Add support for a table generator for the DMC620 PMU block. The table
generator uses the Configuration Manager protocol to obtain the
following information.
  - Number of sockets on the platform
  - DMC620 devices per socket

After obtaining the socket based topology, information is obtained on
individual DMC620 devices. This includes
  - PMU register base address and length
  - Information on the associated PMU interrupt

The table generator uses the Dynamic AML CodeGen API's for generating
the table from the information obtained through the Configuration
Manager protocol.

[1] - https://developer.arm.com/documentation/den0093/1-2eac1/

Signed-off-by: Sughosh Ganu &lt;sughosh.ganu@arm.com&gt;
</content>
</entry>
<entry>
<title>DynamicTablesPkg/RISC-V: Add AcpiSsdtPlicAplicLib library</title>
<updated>2025-12-02T20:52:41+00:00</updated>
<author>
<name>Sunil V L</name>
<email>sunilvl@ventanamicro.com</email>
</author>
<published>2024-07-23T15:09:33+00:00</published>
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<id>urn:sha1:3a026170a48d72c3da2a5ff736f5dd1855fd0666</id>
<content type='text'>
Add AcpiSsdtPlicAplicLib to create PLIC and APLIC device entries in the
RISC-V namespace. These interrupt controller devices are essential for
accurate ACPI namespace representation on RISC-V platforms.

This library facilitates SSDT generation for PLIC and APLIC, enabling
proper OS discovery and configuration.

Signed-off-by: Sunil V L &lt;sunilvl@ventanamicro.com&gt;
</content>
</entry>
<entry>
<title>DynamicTablesPkg/Acpi: Add RHCT generator for RISC-V</title>
<updated>2025-12-02T20:52:41+00:00</updated>
<author>
<name>Sunil V L</name>
<email>sunilvl@ventanamicro.com</email>
</author>
<published>2024-11-27T04:53:53+00:00</published>
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<id>urn:sha1:d612fd272f2680b28854fd18e51027fc1ac2628a</id>
<content type='text'>
Add a generator for the RISC-V Hart Capabilities Table (RHCT), a new
ACPI table used to convey CPU feature information to the operating
system.

This generator enables firmware to describe RISC-V hart capabilities
in a standardized way as part of the ACPI table set.

Signed-off-by: Sunil V L &lt;sunilvl@ventanamicro.com&gt;
</content>
</entry>
<entry>
<title>DynamicTablesPkg/Acpi: Add MADT generator for RISC-V</title>
<updated>2025-12-02T20:52:41+00:00</updated>
<author>
<name>Sunil V L</name>
<email>sunilvl@ventanamicro.com</email>
</author>
<published>2024-11-27T04:51:46+00:00</published>
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<id>urn:sha1:319114e477d72bc55d36267548344f66fbd24d89</id>
<content type='text'>
Add a MADT (Multiple APIC Description Table) generator implementation
for RISC-V. RISC-V platforms may use one or more of the following
interrupt controllers: RINTC, IMSIC, PLIC, and APLIC.

This generator constructs the appropriate MADT entries for the
supported controllers and enables MADT generation for RISC-V platforms.

Signed-off-by: Sunil V L &lt;sunilvl@ventanamicro.com&gt;
</content>
</entry>
<entry>
<title>DynamicTablesPkg/AcpiSratLib: Add RISC-V support</title>
<updated>2025-12-02T20:52:41+00:00</updated>
<author>
<name>Sunil V L</name>
<email>sunilvl@ventanamicro.com</email>
</author>
<published>2024-06-24T16:22:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=2ad2a4d07631598e187da3730df730516f977e24'/>
<id>urn:sha1:2ad2a4d07631598e187da3730df730516f977e24</id>
<content type='text'>
Add support for generating the ACPI SRAT (System Resource Affinity Table)
for RISC-V platforms.

Signed-off-by: Sunil V L &lt;sunilvl@ventanamicro.com&gt;
</content>
</entry>
<entry>
<title>DynamicTablesPkg/AcpiDbg2Lib: Add RISC-V support</title>
<updated>2025-12-02T20:52:41+00:00</updated>
<author>
<name>Sunil V L</name>
<email>sunilvl@ventanamicro.com</email>
</author>
<published>2024-06-24T16:21:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=7b6ba9f31f7c5c3d6dcaed67babc2adba2147bd9'/>
<id>urn:sha1:7b6ba9f31f7c5c3d6dcaed67babc2adba2147bd9</id>
<content type='text'>
Add support for generating the ACPI DBG2 (Debug Port Table) for RISC-V
platforms.

Signed-off-by: Sunil V L &lt;sunilvl@ventanamicro.com&gt;
</content>
</entry>
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