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<title>Tianocore/edk2.git/BaseTools/Scripts/GccBase.lds, branch dependabot/github_actions/actions/github-script-9</title>
<subtitle>EDK II (mirror)</subtitle>
<id>https://git.radix-linux.su/Tianocore/edk2.git/atom?h=dependabot%2Fgithub_actions%2Factions%2Fgithub-script-9</id>
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<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/'/>
<updated>2025-10-17T06:23:17+00:00</updated>
<entry>
<title>BaseTools/Scripts: KEEP .prmexportdescriptor data sections</title>
<updated>2025-10-17T06:23:17+00:00</updated>
<author>
<name>Michael D Kinney</name>
<email>michael.d.kinney@intel.com</email>
</author>
<published>2025-10-02T22:57:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=3980808abf4599ce601fd39ea70bc1f4385172af'/>
<id>urn:sha1:3980808abf4599ce601fd39ea70bc1f4385172af</id>
<content type='text'>
Update GCC linker script to always keep .prmexportdescriptor
sections and merge them into the .data section.

The .prmexportdescriptor section is only used by PRM modules
for the PRM Export Descriptor Structure that must be kept
in the final image to support adding the PRM Export
Descriptor Structure and its associated PRM Handlers APIs
to a PE/COFF DLL Export section.

Signed-off-by: Michael D Kinney &lt;michael.d.kinney@intel.com&gt;
</content>
</entry>
<entry>
<title>BaseTools/Scripts/GccBase.lds: Use separate R-W and RW- ELF segments</title>
<updated>2025-02-02T09:20:53+00:00</updated>
<author>
<name>Ard Biesheuvel</name>
<email>ardb@kernel.org</email>
</author>
<published>2025-01-28T09:34:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=f2b42c83dd0086dce484eae47b87b4351426746e'/>
<id>urn:sha1:f2b42c83dd0086dce484eae47b87b4351426746e</id>
<content type='text'>
To prevent the ELF linkers from complaining about emitted ELF segments
that require both writable and executable permissions, define two
separate R-X and RW- ELF segments, and emit the output sections
explicitly into those segments as appropriate.

Note that this has no bearing on the PE image, and using a single RW-
segment would probably be fine too.

Signed-off-by: Ard Biesheuvel &lt;ardb@kernel.org&gt;
</content>
</entry>
<entry>
<title>BaseTools/Scripts: Merge GCC and Clang ELF linker scripts</title>
<updated>2025-02-02T09:20:53+00:00</updated>
<author>
<name>Ard Biesheuvel</name>
<email>ardb@kernel.org</email>
</author>
<published>2025-01-28T09:03:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=e5d95c786b6f25d81d754cb1d1b439a8b5c2340c'/>
<id>urn:sha1:e5d95c786b6f25d81d754cb1d1b439a8b5c2340c</id>
<content type='text'>
The original reason for creating a separate version of the ELF linker
script for Clang was the difference between COMMONPAGESIZE and
MAXPAGESIZE, which can we provided on the command line to the respective
linkers (ld.bfd versus lld). That difference no longer exists, and both
use COMMONPAGE_SIZE. So there is no longer a need to maintain a fork,
which has already been going out of sync with the original for no good
reason.

So merge the two and call it GccBase.lds

Signed-off-by: Ard Biesheuvel &lt;ardb@kernel.org&gt;
</content>
</entry>
<entry>
<title>BaseTools: make sure the got is empty</title>
<updated>2023-06-01T10:53:35+00:00</updated>
<author>
<name>Gerd Hoffmann</name>
<email>kraxel@redhat.com</email>
</author>
<published>2023-05-24T14:05:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=7ffc433c2ec1db3a600ad78ba4c44d863991967f'/>
<id>urn:sha1:7ffc433c2ec1db3a600ad78ba4c44d863991967f</id>
<content type='text'>
Add ASSERT()s that .got and .got.plt sections are empty
to linker scripts for gcc and clang.

Suggested-by: Ard Biesheuvel &lt;ardb@kernel.org&gt;
Signed-off-by: Gerd Hoffmann &lt;kraxel@redhat.com&gt;
Reviewed-by: Liming Gao &lt;gaoliming@byosoft.com.cn&gt;
Reviewed-by: Rebecca Cran &lt;rebecca@bsdio.com&gt;
</content>
</entry>
<entry>
<title>BaseTools: Remove COMMON section from the GCC discard list</title>
<updated>2021-07-26T07:30:11+00:00</updated>
<author>
<name>Christopher Zurcher</name>
<email>christopher.zurcher@microsoft.com</email>
</author>
<published>2021-07-20T22:06:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=4d28a1c2fdf3673650018cf16f76cfc9796e78af'/>
<id>urn:sha1:4d28a1c2fdf3673650018cf16f76cfc9796e78af</id>
<content type='text'>
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2507

The COMMON section is used by OpenSSL assembly-optimized crypto
functions. OpenSSL assembly code is auto-generated from the submodule
and cannot be modified to remove dependence on the COMMON section.
The default -fno-common compiler flag should still prevent variable from
being emitted into the COMMON section.

Cc: Ard Biesheuvel &lt;ardb@kernel.org&gt;
Cc: Bob Feng &lt;bob.c.feng@intel.com&gt;
Cc: Liming Gao &lt;gaoliming@byosoft.com.cn&gt;
Signed-off-by: Christopher Zurcher &lt;christopher.zurcher@microsoft.com&gt;
Reviewed-by: Liming Gao &lt;gaoliming@byosoft.com.cn&gt;
Acked-by: Jiewen Yao &lt;Jiewen.yao@intel.com&gt;
</content>
</entry>
<entry>
<title>BaseTools: Replace BSD License with BSD+Patent License</title>
<updated>2019-04-09T16:10:20+00:00</updated>
<author>
<name>Michael D Kinney</name>
<email>michael.d.kinney@intel.com</email>
</author>
<published>2019-04-03T23:03:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=2e351cbe8e190271b3716284fc1076551d005472'/>
<id>urn:sha1:2e351cbe8e190271b3716284fc1076551d005472</id>
<content type='text'>
https://bugzilla.tianocore.org/show_bug.cgi?id=1373

Replace BSD 2-Clause License with BSD+Patent License.  This change is
based on the following emails:

  https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html
  https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html

RFCs with detailed process for the license change:

  V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html
  V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html
  V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Michael D Kinney &lt;michael.d.kinney@intel.com&gt;
Reviewed-by: Bob Feng &lt;bob.c.feng@intel.com&gt;
</content>
</entry>
<entry>
<title>BaseTools/Scripts: fix GccBase.lds line endings</title>
<updated>2017-05-28T12:07:02+00:00</updated>
<author>
<name>Ard Biesheuvel</name>
<email>ard.biesheuvel@linaro.org</email>
</author>
<published>2017-05-28T12:04:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=f4d3ba87bb8f5d82d3b80532ea4c83b7bbca41c0'/>
<id>urn:sha1:f4d3ba87bb8f5d82d3b80532ea4c83b7bbca41c0</id>
<content type='text'>
Replace a &lt;LF&gt; line ending that was introduced inadvertently by a
recent commit with the correct &lt;CR&gt;&lt;LF&gt;

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;
</content>
</entry>
<entry>
<title>BaseTools/Scripts: discard .gnu.hash section in GCC builds</title>
<updated>2017-05-24T13:09:39+00:00</updated>
<author>
<name>Ard Biesheuvel</name>
<email>ard.biesheuvel@linaro.org</email>
</author>
<published>2017-05-19T10:47:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=00b00cc57bfe0fca54c904d4dd44a263e243c88b'/>
<id>urn:sha1:00b00cc57bfe0fca54c904d4dd44a263e243c88b</id>
<content type='text'>
Some builds of GCC/binutils will default to using the GNU flavor of
the symbol hash table, and will emit it into a section called .gnu.hash
rather than .hash. We have no use for its contents, and GenFw ignores
it anyway, so it shouldn't really matter what we do with it.

However, due to a workaround for AARCH64 we have in GenFw to deal with
older GCCs that corrupt section-based relocations when merging sections
during the final link, we need the ELF and PE/COFF views of the binary
to be identical. Since we don't place the .gnu.hash section explicitly,
it may end up at the beginning of the ELF binary, causing other sections
to be shifted in the ELF view but not in the PE/COFF view.

So let's add .gnu.hash to the GCC linker script. We don't care about its
contents so add it to the /DISCARD/ section.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;
Tested-by: Leif Lindholm &lt;leif.lindholm@linaro.org&gt;
Reviewed-by: Liming Gao &lt;liming.gao@intel.com&gt;
</content>
</entry>
<entry>
<title>BaseTools: GCC: move most AutoGen.obj contents back to .data section</title>
<updated>2017-02-24T10:27:56+00:00</updated>
<author>
<name>Ard Biesheuvel</name>
<email>ard.biesheuvel@linaro.org</email>
</author>
<published>2017-02-23T18:30:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=3cf41b8728a39d1e0d3ee7ae1a1be5f4ecf3b8d9'/>
<id>urn:sha1:3cf41b8728a39d1e0d3ee7ae1a1be5f4ecf3b8d9</id>
<content type='text'>
The generated AutoGen.c files mostly contain read-only data, but due to
lacking annotations, all of it is emitted into the .data section by the
compiler.

Given that GUIDs are UEFI's gaffer tape, having writable GUIDs is a
security hazard, and this was the main rationale for putting AutoGen.obj
in the .text section. However, as it turns out, patchable PCDs are emitted
there as well, which can legally be modified at runtime.

So update the wildcard pattern to only match g...Guid sections, and move
everything else back to .data (Note that this relies on -fdata-sections,
without that option, everything is emitted into .data)

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;
Tested-by: Laszlo Ersek &lt;lersek@redhat.com&gt;
Reviewed-by: Liming Gao &lt;liming.gao@intel.com&gt;
Fixes: 233bd25b000f92fc4bbe181fa48edcd72808de8e
[lersek@redhat.com: add reference to previous commit being fixed up]
Signed-off-by: Laszlo Ersek &lt;lersek@redhat.com&gt;
</content>
</entry>
<entry>
<title>BaseTools/GccBase.lds: don't copy RELA section to PE/COFF</title>
<updated>2016-08-22T10:26:42+00:00</updated>
<author>
<name>Ard Biesheuvel</name>
<email>ard.biesheuvel@linaro.org</email>
</author>
<published>2016-08-10T08:55:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2.git/commit/?id=669a7562cb3488f36550dc43b8db8d312da1f281'/>
<id>urn:sha1:669a7562cb3488f36550dc43b8db8d312da1f281</id>
<content type='text'>
The CLANG38 toolchain creates a PIE binary at link time. This is
necessary since the LTO code generation may otherwise result in
code that cannot execute correctly when loaded above 2 GB.

PIE executables contain a RELA section consisting of dynamic
relocation entries that are intended for consumption by the loader
at runtime. For this reason, it has the SHF_ALLOC attribute set by
default, and will be identified by GenFw as a section that needs to
be copied into the PE/COFF binary, resulting in waste of space since
the PE/COFF loader does not use this data at all.

So mark the RELA section as informational: this will prevent the
linker from setting the SHF_ALLOC attribute, causing GenFw to
ignore it.

DxeCore.efi before:

    Detected 'X64' type PE/COFF image consisting of 3 sections
    Section alignment:      0x40
    File alignment:         0x40
    Section '.text' @ 0x00000240
    File offset:            0x240
    Virtual size:           0x21000
    Raw size:               0x21000
    Section '.data' @ 0x00021240
    File offset:            0x21240
    Virtual size:           0x3640
    Raw size:               0x3640
    Section '.reloc' @ 0x00024880
    File offset:            0x24880
    Virtual size:           0x280
    Raw size:               0x280

DxeCore.efi after:

    Detected 'X64' type PE/COFF image consisting of 3 sections
    Section alignment:      0x40
    File alignment:         0x40
    Section '.text' @ 0x00000240
    File offset:            0x240
    Virtual size:           0x1f440
    Raw size:               0x1f440
    Section '.data' @ 0x0001f680
    File offset:            0x1f680
    Virtual size:           0x3640
    Raw size:               0x3640
    Section '.reloc' @ 0x00022cc0
    File offset:            0x22cc0
    Virtual size:           0x280
    Raw size:               0x280

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;
Reviewed-by: Liming Gao &lt;liming.gao@intel.com&gt;
</content>
</entry>
</feed>
