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Set PcdAcpiBaseAddress to 0x400 for PEI MM communication.
Signed-off-by: Wei6 Xu <wei6.xu@intel.com>
Co-authored-by: Jiaxin Wu <jiaxin.wu@intel.com>
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Install an instance of EFI_PEI_MM_CONTROL_PPI.
This PPI provides a standard way for other modules to
trigger software SMIs.
Signed-off-by: Ray Ni <ray.ni@intel.com>
Co-authored-by: Jiaxin Wu <jiaxin.wu@intel.com>
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This patch is to add SmmControlLib.
Signed-off-by: Ray Ni <ray.ni@intel.com>
Co-authored-by: Jiaxin Wu <jiaxin.wu@intel.com>
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Do the smm relocation during platform init.
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
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This patch is to add SmmRelocationLib for SMM CPU driver usage.
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
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This patch is to enable the PcdSmrrEnable since the simics
report it has the capability to enable the smrr.
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
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When building MinPlatformPkg, a build error occured because the inf was
not found. The path was incorrect -- DxePhatAcpiLib folder doesn't
exist, PhatAcpiLib does.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Vivian Nowka-Keane <vnowkakeane@linux.microsoft.com>
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Because Alder Lake FSP includes an older version of CpuMpPei MpInfo2HobPei
is needed to boot with newer versions of EDK II.
Accordingly, this change adds MpInfo2HobPei to FvPostMemory.
Reviewed-by: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Rosen Chuang <rosen.chuang@intel.com>
Cc: Saloni Kasbekar <saloni.kasbekar@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
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MpInfo2HobPei provides backwards compatibility between FSP binaries built with
older versions of EDK II and the latest EDK II.
Newer versions of CpuMpPei produce the gMpInformation2HobGuid. This HOB is
required by newer implementations of the CPU DXE driver, however older
versions of CpuMpPei do not produce it. This PEIM will check if CpuMpPei
creates gMpInformation2HobGuid and if it does not it creates it.
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
Reviewed-by: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Rosen Chuang <rosen.chuang@intel.com>
Cc: Saloni Kasbekar <saloni.kasbekar@intel.com>
Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
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Update the MadtLen varaible before the next record is read,
to void infinite loop.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
Signed-off-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
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Adds MM_STANDALONE instances for core LibraryClasses to facilitate using
Standalone MM in platform code.
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
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https://bugzilla.tianocore.org/show_bug.cgi?id=4665
1. Since installing windows does not meet the minimum system requirements,
Added TPM related code to meet the requirements.
2. Support stage 6, add FvAdvancedPreMemory.
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Rosen Chuang <rosen.chuang@intel.com>
Reviewed-by: Saloni Kasbekar <saloni.kasbekar@intel.com>
Cc: Haoyu Tang <haoyu.tang@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Signed-off-by: Dora Hsueh <dorax.hsueh@intel.com>
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REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4771
Due to AlderLakeFspBinPkg will not be maintained going forward, ADL Openboard will reference RaptorLakeFspBinPkg FSP.
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Rosen Chuang <rosen.chuang@intel.com>
Cc: Saloni Kasbekar <saloni.kasbekar@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Dora Hsueh <dorax.hsueh@intel.com>
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https://bugzilla.tianocore.org/show_bug.cgi?id=4761
Halt the TCO timer to fix release mode hang.
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Rosen Chuang <rosen.chuang@intel.com>
Reviewed-by: Saloni Kasbekar <saloni.kasbekar@intel.com>
Cc: Haoyu Tang <haoyu.tang@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Signed-off-by: Dora Hsueh <dorax.hsueh@intel.com>
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Any DSC file that uses the UefiCpuPkg MpInitLib library now requires the
AmdSvsmLib library. Update the DSC files to include the AmdSvsmLib NULL
library implementation.
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Kelly Steele <kelly.steele@intel.com>
Cc: Zailiang Sun <zailiang.sun@intel.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
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https://bugzilla.tianocore.org/show_bug.cgi?id=4662
1. Change MinPlatform MinDsdt to fix hang logo issue.
2. Update SecFspWrapperPlatformSecLib for FSP use.
3. Update SpiFlashCommonLib to fix boot assert issue.
4. Create SmmLocked callback to fix assert
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Rosen Chuang <rosen.chuang@intel.com>
Cc: Saloni Kasbekar <saloni.kasbekar@intel.com>
Cc: Haoyu Tang <haoyu.tang@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: DoraX Hsueh <dorax.hsueh@intel.com>
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Refer to Uefi spec 2.10 section 11.11.2, add a new retval
EFI_NOT_FOUND to EFI_ADAPTER_INFORMATION_PROTOCOL.GetInformation().
Reference: [mantis #1866] - GetInfo() of Adapter Information
Protocol should have a provision for IHV to return no data.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
Signed-off-by: Qingyu <qingyu.shang@intel.com>
Signed-off-by: Gahan Saraiya <gahan.saraiya@intel.com>
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Sort ApicIdOrderTable by following special rules:
1. Make sure BSP is the first entry.
2. For APs, big core first, then small core.
With this implementation, BIOS can present cores in order
of relative performance in MADT. Linux OS would schedule
cores by the order that they are presented in the MADT
LocalX2ApicStruct entries.Then Linux OS would think of
this as relative performance order. This implementation
can benefit the linux os usage case.
Signed-off-by: Dun Tan <dun.tan@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Cc: Jason Lou <yun.lou@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
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Add a new field CoreType in EFI_CPU_ID_ORDER_MAP
and get CoreType for all cores.
Signed-off-by: Dun Tan <dun.tan@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Cc: Jason Lou <yun.lou@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
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This global variable mForceX2ApicId is not assigned
to any value in code and will be initialized to 0 when
the driver is loaded. So remove the global variable
and related code that will not be executed.
Signed-off-by: Dun Tan <dun.tan@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Cc: Jason Lou <yun.lou@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
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Change AcpiProcessorUid in CpuApicIdOrderTable to
the index in MpService regardless of disabled core.
Let's take a simple example:
There are 2 enabled cores and 1 disabled core.
APICID Index in MpService
0x0000_0000 0
0x0000_0010(disbaled) 1
0x0000_0040 2
With current implementation, the results of the x2apic
structure entries in MADT are:
MADT Entry APICID AcpiProcessorUid
0 0x0000_0000 0
1 0x0000_0040 1
The AcpiProcessorUid will be associated with the
processor device defined in DSDT/SSDT. To make sure
the x2apic structure entries in MADT can be mapped to
the right processor devices in DSDT, the AcpiProcessorUid
of the second x2apic structure entry in MADT should
be kept as 2, which is the core index in MpService.
Signed-off-by: Dun Tan <dun.tan@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Cc: Jason Lou <yun.lou@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
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Adding missed out call to FreePool API to free the
allocated memory.
Signed-off-by: PhanindraX Babu Pabba <phanindrax.babu.pabba@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
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<Library/PeimEntryPoint.h> declares a bogus
ProcessLibraryConstructorList() for SimicsOpenBoardPkg's SEC module. Rely
on AutoGen for (properly) declaring ProcessLibraryConstructorList().
Update the call.
Build-tested with:
- appending the following directories to PACKAGES_PATH:
Drivers
Features/Intel
Features/Intel/Debugging
Features/Intel/Network
Features/Intel/OutOfBandManagement
Features/Intel/PowerManagement
Features/Intel/SystemInformation
Features/Intel/UserInterface
Platform/Intel
Silicon/Intel
- commenting out "SimicsIch10BinPkg/UndiBinary/UndiDxe.inf" in
"Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc" and
"Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf"
- running the command
build -a IA32 -a X64 -b DEBUG \
-m Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.inf \
-p Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc \
-t GCC5
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=990
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20240305120126.70259-3-lersek@redhat.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
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Adds library instances for MM_Standalone, which are now required to build
IpmiFeaturePkg.
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
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PhatAcpiLib update to match all file names to PhatAcpiLib
and add the library to CoreDxeLib for use.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
Signed-off-by: Zachary Clark-Williams <zachary.clark-williams@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
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Adding a Platform Health Assessment Table (PHAT) ACPI library for
general feature interface with table. Features that use this table will
migrate to utilize the library for accessing and appending the PHAT.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
Signed-off-by: Zachary Clark-Williams <zachary.clark-williams@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
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https://bugzilla.tianocore.org/show_bug.cgi?id=4623
1.Added PeiCoreEntry.nasm, SecEntry.nasm and Stack.nasm for X64.
2.Made changes in common files to support both IA32 and X64.
3.Added the PCDs below for FSP-T UPD revisions and reset vector in FSP.
- PcdFspWrapperResetVectorInFsp
- PcdFspWrapperBfvforResetVectorInFsp
- PcdFsptUpdHeaderRevision
- PcdFsptArchUpdRevision
Reviewed-by: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ashraf Ali S <ashraf.ali.s@intel.com>
Cc: Chinni B Duggapu <chinni.b.duggapu@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Ted Kuo <ted.kuo@intel.com>
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Add Standalone Mm BiosIdLib and format code with Uncrustify.
Cc: Eric Dong <eric.dong@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Lixia Huang <lisa.huang@intel.com>
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This patch is to specify SmmCpuSyncLib instance for MinPlatformPkg
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
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REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4612
Remove PeiDxeTpmPlatformHierarchyLib in Tcg/Library
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
Signed-off-by: Chiang-Chris <chris.chiang@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Rodrigo Gonzalez del Cueto <rodrigo.gonzalez.del.cueto@intel.com>
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Commit 7284c44 in edk2 introduces an incompatibility that causes any
project that uses DxeMain.inf to fail to build. This is due to the
addition of ImagePropertiesRecordLib, and a new added dependency on
that library in DxeMain. Platforms will not have this LibraryClass
defined in their DSC yet and hence currently fail to build.
This changes addes ImagePropertiesRecordLib to Vlv2TbltDevicePkg
and resolves the build failure.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Zailiang Sun <zailiang.sun@intel.com>
Cc: Yi Qian <yi.qian@intel.com>
Cc: Taylor Beebe <taylor.d.beebe@gmail.com>
Reviewed-by: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
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Commit 7284c44 in edk2 introduces an incompatibility that causes any
project that uses DxeMain.inf to fail to build. This is due to the
addition of ImagePropertiesRecordLib, and a new added dependency on
that library in DxeMain. Platforms will not have this LibraryClass
defined in their DSC yet and hence currently fail to build.
This changes addes ImagePropertiesRecordLib to QuarkPlatformPkg
and resolves the build failure.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Kelly Steele <kelly.steele@intel.com>
Cc: Taylor Beebe <taylor.d.beebe@gmail.com>
Reviewed-by: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
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Commit 7284c44 in edk2 introduces an incompatibility that causes any
project that uses DxeMain.inf to fail to build. This is due to the
addition of ImagePropertiesRecordLib, and a new added dependency on
that library. Platforms will not have this LibraryClass defined in
their DSC yet and hence currently fail to build.
This changes addes ImagePropertiesRecordLib to CoreCommonLib.dsc,
which will be picked up by all platforms that adhere to the
MinPlatform Architecture. This will fix all platform builds in
edk2-platforms/Platform/Intel.
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Taylor Beebe <taylor.d.beebe@gmail.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
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Should build FirmwarePerformancePei only when perf enabled.
Avoiding unconditional compilation of performance PEI drivers can
save 2KB(LZMA compressed) in PostMem FV, small but important.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
Signed-off-by: Yi Li <yi1.li@intel.com>
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Link to github.com/intel/FSP, which is the canonical OSS place for
all your FSP needs. The old link is not accessible publicly.
Signed-off-by: Pedro Falcato <pedro.falcato@gmail.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Reviewed-by: Sai Chaganty <rangasai.v.chaganty@intel.com>
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Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
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PatchFv tools now run on Python 3.x
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
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Updates Microcode and Silicon FV sizes so
they can accomodate the newest content.
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
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Adds SmmLockBox driver which is needed to
build with the newest version of MinPlatformPkg
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
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Removes the assumption that the python interpreter will have the name
python.
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com
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Removes the assumption that the python interpreter will have the name
python.
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
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Removes usage PYTHON_HOME from RebaseFspBinBaseAddress.py
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
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Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
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With the fact that CSM is not supported,
the request is to remove the cache setting for memory under 1MB.
This can be treated as the missing part of legacy CSM deprecation.
This patch only set the 00000 to 9FFFF and C0000 to FFFFF as Write Back.
A0000-BFFFF range is still uncacheable for VGA.
Reviewed-by: Eric Dong <eric.dong@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com>
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The length of the Board ID is being updated based on the BOARD_ID
string. If the PCH_TYPE is empty space/single quotes(''), removing the
empty space/single quotes('') and concatenating the
TARGET_PLATFORM_SHORT and BUILD flag strings.
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Cc: T V Krishnamoorthy <krishnamoorthy.t.v@intel.com>
Signed-off-by: ManickamX Srinivasan <manickamx.srinivasan@intel.com>
Reviewed-by: Bob Feng <bob.c.feng@intel.com>
Reviewed-by: Yuwei Chen <yuwei.chen@intel.com>
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This change adds the configuration to enable build for AlderlakePRvp.
Also it updates Alderlake P Rvp details to the Readme.md.
Reviewed-by: Sai Chaganty <rangasai.v.chaganty@intel.com>
Reviewed-by: Rosen Chuang <rosen.chuang@intel.com>
Acked-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Rosen Chuang <rosen.chuang@intel.com>
Signed-off-by: Saloni Kasbekar <saloni.kasbekar@intel.com>
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Adds the DSC and build files necessary to build the
AlderlakePRvp board instance.
Key files:
* build_config.cfg - Board-specific build configuration file.
* OpenBoardPkg.dsc - The AlderlakePRvp board description file.
* OpenBoardPkgPcd.dsc - Used for other PCD customization.
* OpenBoardPkg.fdf - The AlderlakePRvp board flash file.
* OpenBoardPkgBuildOption.dsc - Sets build options Based on PCD values.
* FlashMapInclude.fdf - AlderlakePRvp flash map file.
Reviewed-by: Sai Chaganty <rangasai.v.chaganty@intel.com>
Reviewed-by: Rosen Chuang <rosen.chuang@intel.com>
Acked-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Rosen Chuang <rosen.chuang@intel.com>
Signed-off-by: Saloni Kasbekar <saloni.kasbekar@intel.com>
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Aowanda platform
Fix to resolve the build error for JunctionCity and Aowanda platform.
Updated PcdFlashFvSecuritySize in JunctionCity\PlatformPkg.fdf and
Aowanda\PlatformPkg.fdf
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Harikrishna Doppalapudi <harikrishnad@ami.com>
Cc: Sureshkumar Ponnusamy <sureshkumarp@ami.com>
Cc: Manickavasakam Karpagavinayagam <manickavasakamk@ami.com>
Cc: Selvaraj V <selvarajv@ami.com>
Cc: Ramkumar Krishnamoorthi <ramkumark@ami.com>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Ramkumar Krishnamoorthi <ramkumark@ami.com>
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Adds the following libraries
- BasePlatformHookLib
- PeiBoardConfigLib
- PeiGetFvInfoLib
- SmmSpiFlashCommonLib
Reviewed-by: Sai Chaganty <rangasai.v.chaganty@intel.com>
Reviewed-by: Rosen Chuang <rosen.chuang@intel.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Rosen Chuang <rosen.chuang@intel.com>
Signed-off-by: Saloni Kasbekar <saloni.kasbekar@intel.com>
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Adds the following libraries within the Policy module
- DxeSiliconPolicyUpdateLib
- PeiPolicyUpdateLib
- PeiSiliconPolicyUpdateLib
Reviewed-by: Sai Chaganty <rangasai.v.chaganty@intel.com>
Reviewed-by: Rosen Chuang <rosen.chuang@intel.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Rosen Chuang <rosen.chuang@intel.com>
Signed-off-by: Saloni Kasbekar <saloni.kasbekar@intel.com>
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