Tianocore/edk2-platforms.git/Silicon, branch CodeCleanupEDK II sample platform branches and tags (mirror)https://git.radix-linux.su/Tianocore/edk2-platforms.git/atom?h=CodeCleanup2024-07-04T11:14:46+00:00Silicon/RiscVOpensbiLib: fix submodule version2024-07-04T11:14:46+00:00Leif Lindholmquic_llindhol@quicinc.com2024-06-24T11:41:50+00:00urn:sha1:ff6e91e106cc511f7f5469dbc5261b9fa9b80f54
Commit 4f32c34865de,
("Platform/AMD: Initial commit of cross platform/board interfaces")
presumably by accident reverts the opensbi submodule update done in
commmit 2d8289634ec9 ("ProcessorPkg/opensbi: Update opensbi library").
Correct this and restore the submodule version.
Cc: Daniel Schaefer <git@danielschaefer.me>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Cc: Abner Chang <abner.chang@amd.com>
Signed-off-by: Leif Lindholm <quic_llindhol@quicinc.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
Silicon/Intel: Support MM_STANDALONE for the PCH SPI Interface2024-06-28T08:49:41+00:00Jiaxin Wujiaxin.wu@intel.com2024-06-22T05:54:26+00:00urn:sha1:ba73190ddccc0d0e8c9ff4d3cac1f10bde8b0f71
This patch Add a new PchSpiStandaloneMm.inf driver for the PCH
SPI Interface support.
Signed-off-by: Ray Ni <ray.ni@intel.com>
Co-authored-by: Jiaxin Wu <jiaxin.wu@intel.com>
Silicon/Intel: Support MM_STANDALONE for SmmSpiFlashCommonLib2024-06-28T06:01:19+00:00Jiaxin Wujiaxin.wu@intel.com2024-06-22T05:50:48+00:00urn:sha1:959fdd71711db7470034618549293608c5096440
Signed-off-by: Ray Ni <ray.ni@intel.com>
Co-authored-by: Jiaxin Wu <jiaxin.wu@intel.com>
SbsaQemu: bump OemRevision to today2024-06-25T18:18:29+00:00Marcin Juszkiewiczmarcin.juszkiewicz@linaro.org2024-06-25T17:54:50+00:00urn:sha1:feff6a709d5d4d392f4f34529b909e2c4176fa33
Lot of time passed since 10th of August 2020 when this platform was
added to EDK2-platforms repository.
So let bump PcdAcpiDefaultOemRevision value to today. So everyone will
see during OS boot that things are changing.
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
SbsaQemu: reformat all sources using uncrustify2024-06-23T08:15:12+00:00Marcin Juszkiewiczmarcin.juszkiewicz@linaro.org2024-06-21T14:02:48+00:00urn:sha1:3425cf8eb5f1bdf5c94599549e3abcb9868df7b8
uncrustify is required in EDK2 repository. SbsaQemu (and other platforms
in edk2-platforms) code was free from using it IIRC.
Reformat all files to make new contributions easier. We can recommend
formatting sources without generating extra work for developers.
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
Platform,Silicon: drop redundant uses of PcdArmArchTimerFreqInHz2024-06-21T11:31:20+00:00Leif Lindholmquic_llindhol@quicinc.com2024-06-20T10:11:20+00:00urn:sha1:b29e69a688d6154a84df725cee38273553062160
PcdArmArchTimerFreqInHz is about to be removed, as it is now obsolete.
Some platforms already explicitly set it to 0, which is the default.
And some modules reference it in their .inf without actually ever
using it.
Drop these redundant uses first.
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Chuong Tran <chuong@os.amperecomputing.com>
Cc: Graeme Gregory <graeme@xora.org.uk>
Cc: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Cc: Nhi Pham <nhi@os.amperecomputing.com>
Cc: Rebecca Cran <rebecca@os.amperecomputing.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Thomas Abraham <thomas.abraham@arm.com>
Cc: Wenyi Xie <xiewenyi2@huawei.com>
Signed-off-by: Leif Lindholm <quic_llindhol@quicinc.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Nhi Pham <nhi@os.amperecomputing.com>
Platform/SbsaQemu: fix .dsc line endings2024-06-21T11:28:46+00:00Leif Lindholmquic_llindhol@quicinc.com2024-06-20T10:05:18+00:00urn:sha1:901d6e59b9a65ccc434ce67575564b59c201164f
A patch adding a mapping for ImagePropertiesRecordLib introduced a bunch of
LF line endings in otherwise CRLF files, so clean that up.
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Chuong Tran <chuong@os.amperecomputing.com>
Cc: Graeme Gregory <graeme@xora.org.uk>
Cc: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Cc: Marcin Wojtas <marcin.s.wojtas@gmail.com>
Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Cc: Narinder Dhillon <ndhillon@marvell.com>
Cc: Nhi Pham <nhi@os.amperecomputing.com>
Cc: Rebecca Cran <rebecca@os.amperecomputing.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Thomas Abraham <thomas.abraham@arm.com>
Signed-off-by: Leif Lindholm <quic_llindhol@quicinc.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
IntelSiliconPkg: Update Header File to Align FIT Specification 1.52024-06-19T02:32:57+00:00Jason1 Linjason1.lin@intel.com2024-06-19T02:26:27+00:00urn:sha1:96f2425230de86fc56542622f12d56c5df730617
(1) Add the below definition for FIT entry type
- FIT_TYPE_03_DIAGNOSTIC_ACM
- FIT_TYPE_05_MMC_FIRMWARE_IMAGE
- FIT_TYPE_06_FIT_RESET_STATE
- FIT_TYPE_1A_VAB_PROVISIONING_TABLE
- FIT_TYPE_1B_VAB_KEY_MANIFEST
- FIT_TYPE_1C_VAB_IMAGE_MANIFEST
- FIT_TYPE_1D_VAB_IMAGE_HASH_DESC
- FIT_TYPE_2C_SACM_DEBUG
- FIT_TYPE_2E_GRANULAR_SCRTM_ERROR
(2) Add the below definition to support FIT table range
- FIT_TABLE_LOWER_ADDRESS
- FIT_TABLE_UPPER_ADDRESS
(3) Add the below definition and structure for Type02 (Ver. 0x200) entry
- FIT_TYPE_02_VERSION_200
- FIT_TYPE_02_VERSION_200_ENTRY
Cc: Ashraf Ali S <ashraf.ali.s@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Jason1 Lin <jason1.lin@intel.com>
Silicon/ARM/NeoverseN1Soc: NOR flash library for N1Sdp2024-05-29T15:45:56+00:00sahilsahil@arm.com2024-05-29T08:55:14+00:00urn:sha1:5ae8226c594f75678bb90f8fa36f662b7ef63589
Add NOR flash library, this library provides APIs for getting the list
of NOR flash devices on the platform.
This flash is shared between AP core and System Control Processor. The
lower addresses are used to store SCP and AP boot images and higher
addresses will be used for variable storage.
Signed-off-by: sahil <sahil@arm.com>
Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: levi.yun <yeoreum.yun@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Silicon/ARM/NeoverseN1Soc: Enable SCP QSPI flash region2024-05-29T15:45:56+00:00sahilsahil@arm.com2024-05-29T08:55:13+00:00urn:sha1:c1a49aa29666dfe6a73a21f5ae03cf85443f7510
Enable SCP QSPI flash region access by adding it in the PlatformLibMem.
This flash is shared between AP core and System Control Processor. The
lower addresses are used to store SCP and AP boot images and higher
addresses will be used for variable storage.
Signed-off-by: sahil <sahil@arm.com>
Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: levi.yun <yeoreum.yun@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>